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"劉睿翔"

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Institution	Date	Title	Author
國立臺灣大學	2011	建立製程偏差模型與積體電路之平行模擬	劉睿翔; Liu, Jui-Hsiang
國立臺灣大學	2007	應用於VLSI時序分析之製程誤差統計模型	劉睿翔; Liu, Jui-Hsiang

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