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"顏金泰"

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Showing items 31-55 of 100 (4 Page(s) Totally)
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Institution	Date	Title	Author
中華大學	2010	Obstacle-Aware Longest Path using Rectangular Pattern Detouring in Routing Grids	顏金泰; YAN, JIN-TAI
中華大學	2010	Resource-Constrained Timing-Driven Link Insertion for Critical Delay Reduction	顏金泰; YAN, JIN-TAI
中華大學	2010	在高密度印刷電路板設計下的匯流排導向繞線系統開發	顏金泰
中華大學	2009	Optimal Transformation of Non-tree Topologies for Timing Analysis	顏金泰; YAN, JIN-TAI
中華大學	2009	Low-Power Multiplier Design with Row and Column Bypassing	顏金泰; YAN, JIN-TAI
中華大學	2009	RDL Pre-assignment Routing for Flip-Chip Designs	顏金泰; YAN, JIN-TAI
中華大學	2009	IO Connection Assignment and RDL Routing for Flip-Chip Designs	顏金泰; YAN, JIN-TAI
中華大學	2009	Construction of Constrained Multi-Bit Flip-Flops for Clock Power Reduction	顏金泰; YAN, JIN-TAI
中華大學	2009	Accurate Transformation-Based Timing Analysis for RC Non-tree Circuits	顏金泰; YAN, JIN-TAI
中華大學	2009	Redundant Wire Insertion for Yield Improvement	顏金泰; YAN, JIN-TAI
中華大學	2009	考量溫度限制之三維晶片版面規劃與擺置系統開發	顏金泰
中華大學	2009	計算機組織與結構概論	顏金泰; YAN, JIN-TAI
中華大學	2008	Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment and Path Reconstruction	顏金泰; YAN, JIN-TAI
中華大學	2008	Timing-Constrained Yield-driven Redundant Via Insertion	顏金泰; YAN, JIN-TAI
中華大學	2008	Thermal-Driven White Space Redistribution for Block-Level Floorplans	顏金泰; YAN, JIN-TAI
中華大學	2008	Electromigration-aware Rectilinear Steiner Tree Construction for Analog Circuits	顏金泰; YAN, JIN-TAI
中華大學	2008	Simultaneous Assignment of Power Pads and Wires for Reliability-Driven Hierarchical Power Quad-Grids	顏金泰; YAN, JIN-TAI
中華大學	2008	Timing-Driven Multi-Layer Steiner Tree Construction with Obstacle Avoidance	顏金泰; YAN, JIN-TAI
中華大學	2008	Packing-Driven Sliceable Transformation for 3D Floorplan Designs	顏金泰; YAN, JIN-TAI
中華大學	2008	Noise-Aware Multiple-Voltage Assignment for gate-Level Power Optimization	顏金泰; YAN, JIN-TAI
中華大學	2008	Timing-Driven Steiner Tree Construction for Three-Dimensional ICs	顏金泰; YAN, JIN-TAI
中華大學	2008	Flexible Escape Routing for Flip-Chip Designs	顏金泰; YAN, JIN-TAI
中華大學	2007	Timing-Constrained Redundant Via Insertion for Yield Optimization	顏金泰; YAN, JIN-TAI
中華大學	2007	Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance	顏金泰; YAN, JIN-TAI
中華大學	2007	Top-Down-Based Timing-Driven Steiner Tree Construction with Wire Sizing and Buffer Insertion	顏金泰; YAN, JIN-TAI

Showing items 31-55 of 100 (4 Page(s) Totally)
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