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Taiwan Academic Institutional Repository >
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"馮武雄"
Showing items 106-130 of 177 (8 Page(s) Totally)
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| 國立臺灣大學 |
1989 |
Constrained Via Minimization for Three-Layer Routing
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Chang, K. E.; Jyu, H. F.; 馮武雄; Chang, K. E.; Jyu, H. F.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989 |
Graph Contractibility Problem for VLSI Layer Assignment
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Chang, K. E.; 馮武雄; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989 |
Using Hierarchical Multiple Storage Quad Tree on a Constraint-Graph Layout Compaction
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Hsiao, P. Y.; 馮武雄; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989 |
A Heuristic Scanning Line Approach for an Expert Layout Compactor
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Hsiao, P. Y.; Chen, S. F. Steven; 馮武雄; Hsiao, P. Y.; Chen, S. F. Steven; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989 |
An Efficient Layer Assignment for Three-Layer Restrictive VLSI Routing
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Chang, K. E.; Fang, S. C.; 馮武雄; Chang, K. E.; Fang, S. C.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989 |
Generalized Terminal Connectivity Problem for Multi-Layer Layout Scheme
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Tsai, C. C.; 馮武雄; 陳少傑; Hsiao, P, Y.; Chen, H. F.; Tsai, C. C.; Feng, Wu-Shiung; Chen, Sao-Jie; Hsiao, P, Y.; Chen, H. F. |
| 國立臺灣大學 |
1989 |
The Pin Alignment in VLSI Routing with Movable Terminals
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Chang, K. E.; Fu, C. M.; 馮武雄; Chang, K. E.; Fu, C. M.; Feng, Wu-Shiung |
| 臺大學術典藏 |
1989 |
Generalized Terminal Connectivity Problem for Multi-Layer Layout Scheme
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Tsai, C. C.; Hsiao, P, Y.; Chen, H. F.; Feng, Wu-Shiung; Chen, Sao-Jie; Tsai, C. C.; 馮武雄; 陳少傑; Hsiao, P, Y.; Chen, H. F.; Feng, Wu-Shiung; Chen, Sao-Jie; Chen, H. F. |
| 國立臺灣大學 |
1988-12 |
An Incremental Design Rule Checking Based on Quad Tree Representations
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Hsiao, P. Y.; 馮武雄; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1988 |
超大型積體電路之元件模擬
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龐台銘; 馮武雄; Parng, Tai-Ming; 馮武雄 |
| 國立臺灣大學 |
1988 |
積體式CAD/VLSI模擬系統
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龐台銘; 馮武雄; Parng, Tai-Ming; 馮武雄 |
| 國立臺灣大學 |
1988 |
A Global Approach for Via Minimization
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Jyu, H. F.; 馮武雄; Jyu, H. F.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1988 |
A Rule-Based Compactor for VLSI/CAD Mask Layout
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Hsiao, P. Y.; Syau, C. Y.; 馮武雄; 龐台銘; Hsu, C. C.; Hsiao, P. Y.; Syau, C. Y.; Feng, Wu-Shiung; Parng, Tai-Ming; Hsu, C. C. |
| 國立臺灣大學 |
1988 |
A Rule-Based Expert System for VLSI Layout Compaction
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Hsiao, P. Y.; 馮武雄; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1988 |
An Edge-Oriented Compaction Scheme Based on Multiple Storage Quad Tree
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Hsiao, P. Y.; 馮武雄; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1988 |
The Topological Order Determination for Three-Layer Channel Routing Problem
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Chang, K. E.; Lai, T. H.; 馮武雄; Chang, K. E.; Lai, T. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1988 |
積體式CAD/VLSI模擬系統
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林逢慶; 馮武雄; Lin, Ferng-Ching; 馮武雄 |
| 國立臺灣大學 |
1987-12 |
A New Dynamic Switch-Box Router
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Chang, K. E.; 馮武雄; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1987-09 |
A Fault Grader
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Chen, T. H.; 馮武雄; 林呈祥; Chen, T. H.; Feng, Wu-Shiung; Lin, Chen-Shang |
| 國立臺灣大學 |
1987-09 |
Automatic Floorplan and Placement for Hierarchical Layout System
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Chen, J. Y.; 馮武雄; Chen, J. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1987-09 |
FAMI:A Fast Logic Minimizer for PLA Design
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Maa, N. S.; 馮武雄; Maa, N. S.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1987-05 |
Hierarchical Layout System
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Tsai, C. C.; Kuo, S. T.; Uang, T. C.; Wang, L. J.; Yeap, K. H.; 馮武雄; Tsai, C. C.; Kuo, S. T.; Uang, T. C.; Wang, L. J.; Yeap, K. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1987-05 |
Multi-Level Hierarchical Function Simulation
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馮武雄; Lee, K. S.; Tu, H.; Feng, Wu-Shiung; Lee, K. S.; Tu, H. |
| 國立臺灣大學 |
1987-05 |
The Multiple Storage Quad-Tree in Constraint-Graph Compaction of VLSI Layout
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Hsiao, P. Y.; 馮武雄; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1987 |
Extraction and Modeling of VLSI Cell Layout
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Yeh, K. F.; 馮武雄; Yeh, K. F.; Feng, Wu-Shiung |
Showing items 106-130 of 177 (8 Page(s) Totally)
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