|
English
|
正體中文
|
简体中文
|
Total items :2853327
|
|
Visitors :
45013999
Online Users :
1509
Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"馮武雄"
Showing items 171-177 of 177 (8 Page(s) Totally) << < 1 2 3 4 5 6 7 8 > >> View [10|25|50] records per page
| 國立臺灣大學 |
1985-09 |
Design and Implementation of a Data Path Synthesizer for Digital System
|
Chu, P. C.; Sun, L. F.; 龐台銘; 于惠中; 馮武雄; Chu, P. C.; Sun, L. F.; 龐台銘; 于惠中; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
Design and Implementation of a Net-List Driven Layout System
|
Chen, S. J.; Shi, M. C.; Jan, S. S.; Fan, J. P.; 馮武雄; Chen, S. J.; Shi, M. C.; Jan, S. S.; Fan, J. P.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
The Design and Implementation of a Mixed-Level Logic Simulator
|
Tran, K. T.; 龐台銘; 于惠中; 馮武雄; Tyan, C. L.; Ou, H. C.; Tran, K. T.; 龐台銘; 于惠中; Feng, Wu-Shiung; Tyan, C. L.; Ou, H. C. |
| 國立臺灣大學 |
1985-06 |
An Interactive Symbolic Layout System for Integrated-Circuit Design
|
馮武雄; 于惠中; Feng, Wu-Shiung; Yu, Hui-Jung |
| 國立臺灣大學 |
1985 |
Layout System Vol. 2:Symbolic Layout and Circuit Compaction for CMOS IC Design
|
Chen, S. J.; 龐台銘; 于惠中; 馮武雄; Chen, S. J.; 龐台銘; 于惠中; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985 |
Highly Concurrent Algorithm and Pipelined VLSI Architecture for Solving Covariance Systems
|
Jou, I. C.; Hu, Y. H.; 于惠中; 馮武雄; Jou, I. C.; Hu, Y. H.; Yu, Hui-Jung; Feng, Wu-Shiung |
| 國立臺灣大學 |
1981-09 |
Automatic Layout System for HDTV Chip Design
|
楊武純; 馮武雄; Yang, Wu-Chun; Feng, Wu-Shiung |
Showing items 171-177 of 177 (8 Page(s) Totally) << < 1 2 3 4 5 6 7 8 > >> View [10|25|50] records per page
|