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"馮武雄"的相关文件
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| 國立臺灣大學 |
1986-08 |
Schematic Layout Editor
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Wang, C. I.; 馮武雄; 龐台銘; Wang, C. I.; Feng, Wu-Shiung; Parng, Tai-Ming |
| 國立臺灣大學 |
1986-08 |
Test Sequence Generator
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Ou, H. C.; 馮武雄; Liaw, H. T.; Ou, H. C.; Feng, Wu-Shiung; Liaw, H. T. |
| 國立臺灣大學 |
1986-08 |
Top-Down Placement for Hierarchical Layout System
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Chang, K. E.; 馮武雄; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1986-05 |
Lattice Filter Array Implementation of Pipelined Toeplitz System Solver
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Jou, I. C.; Hu, Y. H.; 馮武雄; Jou, I. C.; Hu, Y. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1986 |
An Interactive Symbolic Layout System for Integrated-Circuit Design - HISLID
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馮武雄; 于惠中; Feng, Wu-Shiung; Yu, Hui-Jung |
| 國立臺灣大學 |
1986 |
Parallel Algorithm and Architecture for Solving Covariance Eigen System
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Jou, I. C.; Hu, Y. H.; 于惠中; 馮武雄; Jou, I. C.; Hu, Y. H.; Yu, Hui-Jung; Feng, Wu-Shiung |
| 國立臺灣大學 |
1986 |
Data Path Modeling and Synthesizing for Digital Systems
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Sun, L. F.; 龐台銘; 馮武雄; Sun, L. F.; Parng, Tai-Ming; Feng, Wu-Shiung |
| 國立臺灣大學 |
1986 |
Integrated Entry and Verification System
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Yuan, Y. C.; 馮武雄; 龐台銘; Yuan, Y. C.; Feng, Wu-Shiung; Parng, Tai-Ming |
| 國立臺灣大學 |
1986 |
Off-State MOSFET's Breakdown
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馮武雄; Feng, Wu-Shiung |
| 國立臺灣大學 |
1986 |
The Growth and Characteristics of GaAs/Ge/Si Materials
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馮武雄; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
Automatic VLSI Circuit Synthesizer System Vol.1:A Programming Logic Array (PLA) Reduction and Generation System
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馮武雄; Parng, T. P.; 于惠中; Chen, S. J.; Sun, L. F.; Feng, Wu-Shiung; Parng, T. P.; Yu, Hui-Jung; Chen, S. J.; Sun, L. F. |
| 國立臺灣大學 |
1985-09 |
Automatic VLSI Circuit Synthesizer System Vol.2:Data Path Synthesizer
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馮武雄; Parng, T. P.; 于惠中; Chen, S. J.; Sun, L. F.; Feng, Wu-Shiung; Parng, T. P.; Yu, Hui-Jung; Chen, S. J.; Sun, L. F. |
| 國立臺灣大學 |
1985-09 |
Automatic VLSI Circuit Synthesizer System Vol.3:Design and Imple Mentation of a Hardware Compiler Optimizer
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馮武雄; Parng, T. P.; 于惠中; Chen, S. J.; Sun, L. F.; Feng, Wu-Shiung; Parng, T. P.; Yu, Hui-Jung; Chen, S. J.; Sun, L. F. |
| 國立臺灣大學 |
1985-09 |
Design Verification System Vol. 1:Design and Implementation of a Mixed-Level Logic Simulator
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于惠中; 龐台銘; 馮武雄; Chen, S. J.; Wu, J. K.; 于惠中; 龐台銘; Feng, Wu-Shiung; Chen, S. J.; Wu, J. K. |
| 國立臺灣大學 |
1985-09 |
Design Verification System Vol. 2:the Knowledge-Based Microcomputer System Troubleshooter
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于惠中; 龐台銘; 馮武雄; Chen, S. J.; Wu, J. K.; 于惠中; 龐台銘; Feng, Wu-Shiung; Chen, S. J.; Wu, J. K. |
| 國立臺灣大學 |
1985-09 |
Integrated VLSI Design System - MPC Chip Design
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Parng, T. P.; 于惠中; 馮武雄; Lee, J. S.; Lin, S.; Ho, H. J.; Parng, T. P.; Yu, Hui-Jung; Feng, Wu-Shiung; Lee, J. S.; Lin, S.; Ho, H. J. |
| 國立臺灣大學 |
1985-09 |
Layout System Vol. 1:Computer-Aided VLSI Routing Design
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Chen, S. J.; 龐台銘; 于惠中; 馮武雄; Chen, S. J.; 龐台銘; 于惠中; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
Layout System Vol. 3:Design and Implementation of a Design Rule Checking System for VLSI Design
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Chen, S. J.; 龐台銘; 于惠中; 馮武雄; Chen, S. J.; 龐台銘; 于惠中; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
New Algorithms and Parallel VLSI Architectures for Solving Covariance System:with Application to Spectrum Estimations of Digital Signal Processing
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于惠中; 龐台銘; 馮武雄; Chen, S. J.; Jou, I. C.; Sung, T. Y.; 于惠中; 龐台銘; Feng, Wu-Shiung; Chen, S. J.; Jou, I. C.; Sung, T. Y. |
| 國立臺灣大學 |
1985-09 |
A Routing Tool
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Yao, H. H.; 馮武雄; 龐台銘; 于惠中; Yao, H. H.; 馮武雄; 龐台銘; Yu, Hui-Jung |
| 國立臺灣大學 |
1985-09 |
Design and Implementation of a Data Path Synthesizer for Digital System
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Chu, P. C.; Sun, L. F.; 龐台銘; 于惠中; 馮武雄; Chu, P. C.; Sun, L. F.; 龐台銘; 于惠中; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
Design and Implementation of a Net-List Driven Layout System
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Chen, S. J.; Shi, M. C.; Jan, S. S.; Fan, J. P.; 馮武雄; Chen, S. J.; Shi, M. C.; Jan, S. S.; Fan, J. P.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1985-09 |
The Design and Implementation of a Mixed-Level Logic Simulator
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Tran, K. T.; 龐台銘; 于惠中; 馮武雄; Tyan, C. L.; Ou, H. C.; Tran, K. T.; 龐台銘; 于惠中; Feng, Wu-Shiung; Tyan, C. L.; Ou, H. C. |
| 國立臺灣大學 |
1985-06 |
An Interactive Symbolic Layout System for Integrated-Circuit Design
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馮武雄; 于惠中; Feng, Wu-Shiung; Yu, Hui-Jung |
| 國立臺灣大學 |
1985 |
Layout System Vol. 2:Symbolic Layout and Circuit Compaction for CMOS IC Design
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Chen, S. J.; 龐台銘; 于惠中; 馮武雄; Chen, S. J.; 龐台銘; 于惠中; Feng, Wu-Shiung |
显示项目 151-175 / 177 (共8页)
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