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Taiwan Academic Institutional Repository >
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"馮武雄"
Showing items 61-85 of 177 (8 Page(s) Totally)
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| 國立臺灣大學 |
1991-10 |
A Knowledge-Based Program for Compacting the Mask Layout of Integrated Circuits
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Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, H. F.; Hsiao, P. Y.; Feng, Wu-Shiung; Tsai, C. C.; Chen, H. F. |
| 國立臺灣大學 |
1991-06 |
A Neural Network Approach to Channel Routing
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Shih, P. H.; Chang, K. E.; 馮武雄; Shih, P. H.; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991-01 |
Generalized Terminal Connectivity Problem for Multi-Layer Layout Scheme
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Tsai, C. C.; 陳少傑; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991-01 |
A Neural Network for Channel Routing
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
數位MOS電路的最佳化設計
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馮武雄 |
| 國立臺灣大學 |
1991 |
實用化的自動佈局系統(台大VLSI-CAD子計畫之三)
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馮武雄 |
| 國立臺灣大學 |
1991 |
A Neural Computation Network for Global Routing
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Shih, P. H.; Chang, K. E.; 馮武雄; Shih, P. H.; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
A New Control Strategy for an Artificial Intelligence Approach to VLSI Layout Compaction
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Hsiao, P. Y.; Chen, H. F. S.; 馮武雄; Hsiao, P. Y.; Chen, H. F. S.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
A New Iterative Construction Approach to Routing with Compacted Area
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Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
An Analog Neural Network Approach to Global Routing Problem
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
An Application of Neural Network on Channel Routing Problem
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
Neural Network Approach to Routing Problem
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Shih, P. H.; 馮武雄; Chang, K. E.; Shih, P. H.; Feng, Wu-Shiung; Chang, K. E. |
| 國立臺灣大學 |
1991 |
Routing Area Compaction Based on Iterative Construction
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Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
A General-Purpose Hopfield Network Simulator
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems
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Fang, S. C.; Chang, K. E.; 馮武雄; 陳少傑; Fang, S. C.; Chang, K. E.; Feng, Wu-Shiung; Chen, Sao-Jie |
| 國立臺灣大學 |
1991 |
Hybrid Routing on Multi-Chip Modules
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Tsai, C. C.; 陳少傑; Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
Transient Sensitivity Computation for Waveform Relaxation-Based Timing Simulation
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Chen, C. J.; 徐爵民; 馮武雄; Chen, C. J.; Shyn, Jyuo-Min; Feng, Wu-Shiung |
| 國立臺灣大學 |
1991 |
Transient Sensitivity Computation in Timing Simulation
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Chen, C. J.; 馮武雄; Chen, C. J.; Feng, Wu-Shiung |
| 臺大學術典藏 |
1991 |
Hybrid Routing on Multi-Chip Modules
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Hsiao, P. Y.; Tsai, C. C.; Chen, Sao-Jie; Feng, Wu-Shiung; Tsai, C. C.; 陳少傑; Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Feng, Wu-Shiung |
| 國立臺灣大學 |
1990-12 |
A New Hybrid Sense Algorithm for Three-Layer Via Minimization with Practical Constraints
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Fang, S. C.; Chang, K. E.; 馮武雄; Fang, S. C.; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1990-05 |
Maximizing Pin Alignment in VLSI Routing with Movable Terminals
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Chang, K. E.; 馮武雄; Chang, K. E.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1990-05 |
Neural Computation for Global Routing
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1990-03 |
A New Method for Two-Dimensional VLSI Layout Compaction Design
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Chen, H. F.; Hsiao, P, Y.; 馮武雄; 陳少傑; Chen, H. F.; Hsiao, P, Y.; Feng, Wu-Shiung; Chen, Sao-Jie |
| 國立臺灣大學 |
1990-03 |
An Alternating Router for Compacted Routing Area
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Tsai, C. C.; 陳少傑; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Feng, Wu-Shiung |
| 國立臺灣大學 |
1990-03 |
Neural Computation for VLSI Global Routing
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Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
Showing items 61-85 of 177 (8 Page(s) Totally)
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