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Institution Date Title Author
國立臺灣科技大學 2020 Open Defect Detection Not Utilizing Boundary Scan Flip-Flops in Assembled Circuit Boards Kanda, M.;Hashizume, M.;Ali, F.A.B.;Yotsuyanagi, H.;Lu, S.-K.
國立臺灣科技大學 2016 Testability for resistive open defects by electrical interconnect test of 3D ICs without boundary scan flip flops Ali, F.A.B;Hashizume, M;Ikiri, Y;Yotsuyanagi, H;Lu, S.-K.
國立臺灣科技大學 2015 A testable design for electrical interconnect tests of 3D ICs Odoriba, A.;Umezu, S.;Hashizume, M.;Yotsuyanagi, H.;Ali, F.A.B.;Lu, S.-K.
國立臺灣科技大學 2015 Electrical interconnect test method of 3D ICs without boundary scan flip flops Hashizume, M;Umezu, S;Ikiri, Y;Ali, F.A.B;Yotsuyanagi, H;Lu, S.-K.

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