| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A high-speed scalable shift-register based on-chip serial communication design for SoC applications
|
Wang, W.; Wu, A.-Y.; AN-YEU(ANDY) WU; Wey, I.-C.; Chen, Y.-G.; Wu, C.-T. |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A memory-reduced Log-MAP kernel for turbo decoder
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AN-YEU(ANDY) WU; Wu, A.-Y.; Lin, C.-H.; Tsai, T.-H. |
| 臺大學術典藏 |
2018-09-10T04:56:07Z |
Algorithms and architectures for split recursive least squares
|
Liu, K.J.Ray;Wu, An-Yeu; Liu, K.J.Ray; Wu, An-Yeu; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:07Z |
Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion
|
Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:06Z |
Robust decision feedback equalizer design using soft-threshold-based multi-layer detection scheme
|
Lin, C.-H.;Wu, A.-Y.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:06Z |
High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme
|
Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:06Z |
Multiplierless multirate decimator / interpolator module generator
|
Jou, S.-J.;Jheng, K.-Y.;Chen, H.-Y.;Wu, A.-Y.; Jou, S.-J.; Jheng, K.-Y.; Chen, H.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:05Z |
A design flow for multiplierless linear-phase fir filters: From system specification to verilog code
|
Jheng, K.-Y.; Jou, S.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:05Z |
A fast and power-saving self-timed manchester carry-bypass adder for booth multiplier-accumulator design
|
Wey, I.-C.; Chow, H.-C.; Chen, Y.-G.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:05Z |
Academia-industry collaboration in SoC design education: Wishes and reality
|
Mashiko, K.; Kanuma, A.; Kozawa, T.; Lee, K.; Wu, A.; Wang, Z.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:56:05Z |
Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique
|
Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:32Z |
Editorial
|
Wu, A.-Y.A.; Koc, U.-V.; Parhi, K.K.; Theodoridis, S.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:32Z |
Implementation of a programmable 64?2048-point FFT/IFFT processor for OFDM-based communication systems
|
Kuo, J.-C.; Wen, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:32Z |
Mixed-Scaling-Rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-perforance rotatioal operations
|
Lin, Z.-X.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:32Z |
Multi-layer 2-D adaptive filtering architecture based on McClellan transformation
|
Liu, K.J.Ray; Wu, An-Yeu; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:31Z |
A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes
|
Wu, Cheng-Shing; Wu, An-Yeu; Lin, Chih-Hsiu; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:31Z |
A novel echo cancellation algorithm and architecture based on multi-part adaptive interpolated FIR filter
|
Wu, C.-S.B.; Wu, A.-Y.A.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:31Z |
A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation
|
Lai, J.-T.; Wu, A.-Y.; Yeh, C.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:33:31Z |
Dual-mode convolutional/SOVA based turbo code decoder VLSI design for wireless communication systems
|
AN-YEU(ANDY) WU; Chen, P.-H.; Kai-Huang; Hsueh, N.-H.; Wu, A.-Y. |
| 臺大學術典藏 |
2018-09-10T04:13:19Z |
VLSI design of a reconfigurable multi-mode Reed-Solomon codec for high-speed communication systems
|
Hsu, H.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:13:19Z |
A unified view for vector rotational CORDIC algorithms and architectures based on angle quantization approach
|
Wu, A.-Y.; Wu, C.-S.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T04:13:18Z |
A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller
|
Wu, C.-S.; Wu, A.-Y.A.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T03:48:22Z |
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter
|
Yu, C.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T03:48:21Z |
A novel Trellis-based searching scheme for EEAS-based CORDIC algorithm
|
Wu, C.-S.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T03:30:01Z |
Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem
|
Leu, Jye-Jong; Wu, An-Yeu; AN-YEU(ANDY) WU |
