| 元智大學 |
2013-11-1 |
Reconfigurable parallel turbo decoder design for multiple high-mobility 4G systems
|
Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu (Andy) Wu |
| 元智大學 |
2013-11-1 |
Reconfigurable parallel turbo decoder design for multiple high-mobility 4G systems
|
Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu (Andy) Wu |
| 元智大學 |
2013-11-1 |
Reconfigurable parallel turbo decoder design for multiple high-mobility 4G systems
|
Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu (Andy) Wu |
| 臺大學術典藏 |
2013 |
Low-complexity sinusoidal-assisted EMD (SAEMD) algorithms for solving mode-mixing problems in HHT
|
Shen, W.-C.;Chen, Y.-H.;Wu, A.-Y.; Shen, W.-C.; Chen, Y.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2012 |
Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems
|
AN-YEU(ANDY) WU; Wu, A.-Y.; Hung, H.-S.; Lin, S.-Y.; Chih-Hao; Chen, K.-C.; Chen, K.-C.;Chih-Hao;Lin, S.-Y.;Hung, H.-S.;Wu, A.-Y. |
| 元智大學 |
2011-12-12 |
0.16nJ/bit/iteration 3.38mm2 turbo decoder chip for WiMAX/LTE standards
|
Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu (Andy) Wu |
| 元智大學 |
2011-12-12 |
0.16nJ/bit/iteration 3.38mm2 turbo decoder chip for WiMAX/LTE standards
|
Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu (Andy) Wu |
| 臺大學術典藏 |
2011 |
Area-efficient scalable MAP processor design for high-throughput multistandard convolutional turbo decoding
|
Lin, C.-H.;Chen, C.-Y.;Wu, A.-Y.; Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2009 |
A channel-adaptive early termination strategy for LDPC decoders
|
Chen, Y.-H.;Chen, Y.-J.;Shih, X.-Y.;Wu, A.-Y.; Chen, Y.-H.; Chen, Y.-J.; Shih, X.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2009 |
Welcome message from An-Yeu Wu, conference co-chair
|
Wu, A.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2008 |
A universal look-ahead algorithm for pipelining IIR filters
|
Chen, Y.-L.; Chen, C.-Y.; Jheng, K.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2008 |
Unified Convolutional/Turbo decoder design using tile-based timing analysis of VA/MAP kernel
|
AN-YEU(ANDY) WU; Wu, A.-Y.; Lin, C.-H.; Li, F.-M. |
| 臺大學術典藏 |
2007 |
A new binomial mapping and optimization algorithm for reduced-complexity mesh-based on-chip network
|
Shen, W.-T.; Chao, C.-H.; Lien, Y.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2006 |
A new noise-tolerant dynamic circuit design with enhanced PDP performance under low SNR environment
|
Chen, Y.-G.; Wey, I.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2006 |
High-performance VLSI architecture of decision feedback equalizer for gigabit systems
|
Lin, C.-H.; Wu, A.-Y.; Li, F.-M.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2001 |
Cost-efficient multiplier-less FIR filter structure based on modified decor transformation
|
Lee, I.-H.; Wu, C.-S.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
1996 |
Parallel programmable video co-processor design
|
Wu, An-Yeu; Ray Liu, K.J.; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU; Wu, An-Yeu;Ray Liu, K.J.;Raghupathy, Arun;Liu, Shang-Chieh |
