臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2019-10-24T07:57:15Z	A Systematic Design Approach on the Band-Tracking Packet Detector (BT-PD) for OFDM-Based UWB Systems	吳安宇;AN-YEU(ANDY) WU;Chien-Hsiung Lee;An-Yeu Wu;Jyh-Ting Lai; Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:14Z	Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder	吳安宇; AN-YEU(ANDY) WU; Tsung-Han Tsai; An-Yeu Wu; Chun-Yu Chen; Cheng-Hung Lin; 吳安宇;AN-YEU(ANDY) WU;Tsung-Han Tsai;An-Yeu Wu;Chun-Yu Chen;Cheng-Hung Lin
臺大學術典藏	2019-10-24T07:57:14Z	Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;You-Gang Chen;I-Chyn Wey; I-Chyn Wey; You-Gang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:14Z	Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Cheng-Hung Lin;Fan-Min Li; Fan-Min Li; Cheng-Hung Lin; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:14Z	Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Keng-Hsien Huang;Chih-hao Chao;Chun-Hsiang Huang;Shu-Yen Lin; Shu-Yen Lin; Chun-Hsiang Huang; Chih-hao Chao; Keng-Hsien Huang; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:13Z	Generalized Pipelined Tomlinson–Harashima Precoder Design Methodology With Build-In Arbitrary Speed-Up Factors	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Yen-Liang Chen; Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:13Z	Design and Implementation of Cost-Efficient Probabilistic-Based Noise-Tolerant VLSI Circuits	吳安宇;AN-YEU(ANDY) WU;Jie Chen;An-Yeu Wu;Chang-Hong Yu;You-Gang Chen;I-Chyn Wey; I-Chyn Wey; You-Gang Chen; Chang-Hong Yu; An-Yeu Wu; Jie Chen; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:12Z	Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Yen-Liang Chen;Cheng-Zhou Zhan; Cheng-Zhou Zhan; Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:12Z	Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chun-Yu Chen;Chen-Hung Lin; Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏	2019-10-24T07:57:12Z	A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm	吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Wei Wang;Wen-Chung Shen;Chia-Tsun Wu; Chia-Tsun Wu; Wen-Chung Shen; Wei Wang; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇

Showing items 101-110 of 312 (32 Page(s) Totally)
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