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"an yeu andy wu"的相关文件
显示项目 161-185 / 312 (共13页)
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| 臺大學術典藏 |
2018-09-10T09:48:38Z |
Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems
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Tsai, P.-A.;Kuo, Y.-H.;Chang, E.-J.;Hsin, H.-K.;Wu, A.-Y.; Tsai, P.-A.; Kuo, Y.-H.; Chang, E.-J.; Hsin, H.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:38Z |
New ping-pong scheduling for low-latency EMD engine design in Hilbert-Huang transform
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Shen, W.-C.;Jen, H.-I.;Wu, A.-Y.; Shen, W.-C.; Jen, H.-I.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
ACO-based fault-aware routing algorithm for Network-on-Chip systems
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Lin, C.-A.;Hsin, H.-K.;Chang, E.-J.;Wu, A.-Y.; Lin, C.-A.; Hsin, H.-K.; Chang, E.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
Accelerating motion-compensated adaptive color Doppler engine on CUDA-based GPU platform
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Lee, I.-H.;Chen, Y.-H.;Huang, N.-S.;Wu, A.-Y.; Lee, I.-H.; Chen, Y.-H.; Huang, N.-S.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
Cost-effective scalable QC-LDPC decoder designs for non-volatile memory systems
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Chung, M.-H.;Lin, Y.-M.;Zhan, C.-Z.;Wu, A.Y.; Chung, M.-H.; Lin, Y.-M.; Zhan, C.-Z.; Wu, A.Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems
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Chen, K.-C.;Lin, S.-Y.;Wu, A.-Y.; Chen, K.-C.; Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
Dual-mode low-complexity codebook searching algorithm and VLSI architecture for LTE/LTE-advanced systems
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Lin, Y.-H.;Chen, Y.-H.;Chu, C.-Y.;Zhan, C.-Z.;Wu, A.-Y.; Lin, Y.-H.; Chen, Y.-H.; Chu, C.-Y.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:48:37Z |
Editorial low-power, intelligent, and secure solutions for realization of internet of things
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Chen, Y.-K.; Wu, A.-Y.; Bayoumi, M.A.; Koushanfar, F.; AN-YEU(ANDY) WU; Chen, Y.-K.;Wu, A.-Y.;Bayoumi, M.A.;Koushanfar, F. |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
ACO-based Deadlock-Aware fully-adaptive routing in Network-on-Chip systems
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Su, K.-Y.; Hsin, H.-K.; Chang, E.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
Foreword
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Wu, A.-Y.; Wang, L.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
Iterative superlinear-convergence SVD beamforming algorithm and VLSI architecture for MIMO-OFDM systems
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Zhan, C.-Z.; Chen, Y.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
Motion artifact elimination algorithm and architecture for eigen-based clutter filter in color doppler processing
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AN-YEU(ANDY) WU; Chen, Y.-H.; Liu, Z.-L.; Lee, I.-H.; Wu, A.-Y. |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
Path-diversity-aware adaptive routing in network-on-chip systems
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Kuo, Y.-H.; Tsai, P.-A.; Ho, H.-P.; Chang, E.-J.; Hsin, H.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:55Z |
Traffic-balanced topology-aware multiple routing adjustment for throttled 3D NoC systems
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Chen, K.-C.;Lin, S.-Y.;Hung, H.-S.;Wu, A.-Y.; Chen, K.-C.; Lin, S.-Y.; Hung, H.-S.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:54Z |
A low-complexity grouping FFT-based codebook searching algorithm in LTE system
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Lin, Y.-H.; Zhan, C.-Z.; Chu, C.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T09:22:14Z |
Networks-on-chip: Architectures, design methodologies, and case studies
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Chen, S.-J.; Wu, A.-Y.A.; Xu, J.; AN-YEU(ANDY) WU; SAO-JIE CHEN |
| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon
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Hsin, H.-K.;Chang, E.-J.;Chao, C.-H.;Lin, S.-Y.;Wu, A.-Y.; Hsin, H.-K.; Chang, E.-J.; Chao, C.-H.; Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part I: Hardware architecture & software development tools
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Wu, C.-J.; Lee, J.-K.; Chu, Y.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU; Chang, D.C.-W.;Lin, T.-J.;Wu, C.-J.;Lee, J.-K.;Chu, Y.-H.;Wu, A.-Y.; Chang, D.C.-W.; Lin, T.-J. |
| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part II: Application programming
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Chen, J.-M.;Liu, C.-N.;Yang, J.-K.;Tseng, S.-Y.;Shih, W.-K.;Wu, A.-Y.; Chen, J.-M.; Liu, C.-N.; Yang, J.-K.; Tseng, S.-Y.; Shih, W.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Traffic-and thermal-aware routing for throttled three-dimensional Network-on-Chip systems
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Lin, S.-Y.;Yin, T.-C.;Wang, H.-Y.;Wu, A.-Y.; Lin, S.-Y.; Yin, T.-C.; Wang, H.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems
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Chao, C.-H.;Yin, T.-C.;Lin, S.-Y.;Wu, A.-Y.; Chao, C.-H.; Yin, T.-C.; Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks
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Chen, K.-C.;Lin, S.-Y.;Shen, W.-C.;Wu, A.-Y.; Chen, K.-C.; Lin, S.-Y.; Shen, W.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems
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Zhan, C.-Z.;Liu, Z.-L.;Wu, A.-Y.; Zhan, C.-Z.; Liu, Z.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Design of transport layer assisted routing for thermal-aware 3D Network-on-Chip
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Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU; Yin, T.-C.;Chao, C.-H.;Lin, S.-Y.;Wu, A.-Y.; Yin, T.-C.; Chao, C.-H. |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders
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Chao, M.-A.;Shih, X.-Y.;Wu, A.-Y.(A.); Chao, M.-A.; Shih, X.-Y.; Wu, A.-Y.(A.); AN-YEU(ANDY) WU |
显示项目 161-185 / 312 (共13页)
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