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"an yeu andy wu"的相關文件
顯示項目 181-205 / 312 (共13頁)
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| 臺大學術典藏 |
2018-09-10T08:43:20Z |
Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems
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Chao, C.-H.;Yin, T.-C.;Lin, S.-Y.;Wu, A.-Y.; Chao, C.-H.; Yin, T.-C.; Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks
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Chen, K.-C.;Lin, S.-Y.;Shen, W.-C.;Wu, A.-Y.; Chen, K.-C.; Lin, S.-Y.; Shen, W.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems
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Zhan, C.-Z.;Liu, Z.-L.;Wu, A.-Y.; Zhan, C.-Z.; Liu, Z.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Design of transport layer assisted routing for thermal-aware 3D Network-on-Chip
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Lin, S.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU; Yin, T.-C.;Chao, C.-H.;Lin, S.-Y.;Wu, A.-Y.; Yin, T.-C.; Chao, C.-H. |
| 臺大學術典藏 |
2018-09-10T08:43:19Z |
Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders
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Chao, M.-A.;Shih, X.-Y.;Wu, A.-Y.(A.); Chao, M.-A.; Shih, X.-Y.; Wu, A.-Y.(A.); AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:43:18Z |
A 0.16nJ/bit/iteration 3.38mm 2 turbo decoder chip for WiMAX/LTE standards
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Lin, C.-H.;Chen, C.-Y.;Chang, E.-J.;Wu, A.-Y.; Lin, C.-H.; Chen, C.-Y.; Chang, E.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:40Z |
Traffic-thermal mutual-coupling co-simulation platform for three-dimensional network-on-chip
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Jheng, K.-Y.;Chao, C.-H.;Wang, H.-Y.;Wu, A.-Y.; Jheng, K.-Y.; Chao, C.-H.; Wang, H.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Generalized pipelined Tomlinson - Harashima precoder design methodology with build-in arbitrary speed-up factors
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Chen, Y.-L.;Wu, A.-Y.; Chen, Y.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Joint-decision adaptive clutter filter and motion-tracking adaptive persistence for color doppler processing in ultrasonic systems
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Chang, K.-T.; Zhan, C.-Z.; Wu, A.-Y.; Chang, K.-T.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Motion-tracking adaptive persistence and adaptive-size median filter for color doppler processing in ultrasound systems on multicore platform
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Zhan, C.-Z.;Chang, K.-T.;Chen, Y.-H.;Li, P.-C.;Wu, A.-Y.; Zhan, C.-Z.; Chang, K.-T.; Chen, Y.-H.; Li, P.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Multi-prediction particle filter for effcient memory utilization
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Chu, C.-Y.;Chao, C.-H.;Chao, M.-A.;Wu, A.-Y.; Chu, C.-Y.; Chao, C.-H.; Chao, M.-A.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Traffic- and thermal-aware run-time thermal management scheme for 3D NoC systems
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Chao, C.-H.;Jheng, K.-Y.;Wang, H.-Y.;Wu, J.-C.;Wu, A.-Y.; Chao, C.-H.; Jheng, K.-Y.; Wang, H.-Y.; Wu, J.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:39Z |
Regional ACO-based routing for load-balancing in NoC systems
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Hsin, H.-K.;Chang, E.-J.;Chao, C.-H.;Wu, A.-Y.; Hsin, H.-K.; Chang, E.-J.; Chao, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
A two-cycle lock-in time ADPLL design based on a frequency estimation algorithm
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Shen, W.-C.; Wang, W.; Wu, A.-Y.; AN-YEU(ANDY) WU; Wu, C.-T.;Shen, W.-C.;Wang, W.;Wu, A.-Y.; Wu, C.-T. |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
ACO-based cascaded adaptive routing for traffic balancing in NoC systems
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Chang, E.-J.;Chao, C.-H.;Jheng, K.-Y.;Hsin, H.-K.;Wu, A.-Y.; Chang, E.-J.; Chao, C.-H.; Jheng, K.-Y.; Hsin, H.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
Cost-effective constrained particle filter for indoor localization
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Chao, C.-H.;Chu, C.-Y.;Chao, M.-A.;Wu, A.-Y.; Chao, C.-H.; Chu, C.-Y.; Chao, M.-A.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
Efficient parallelized particle filter design on CUDA
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Chao, M.-A.;Chu, C.-Y.;Chao, C.-H.;Wu, A.-Y.; Chao, M.-A.; Chu, C.-Y.; Chao, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system
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Chen, Y.-L.;Jheng, T.-J.;Zhan, C.-Z.;Wu, A.-Y.; Chen, Y.-L.; Jheng, T.-J.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:38:01Z |
Scalable low-complexity digit-serial VLSI architecture for RSA cryptosystem
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Leu, Jye-Jong; Wu, An-Yeu; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:38:00Z |
Fault-tolerant router with built-in self-test/self-diagnosis and fault-isolation circuits for 2D-mesh based chip multiprocessor systems
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Lin, S.-Y.;Shen, W.-C.;Hsu, C.-C.;Chao, C.-H.;Wu, A.-Y.; Lin, S.-Y.; Shen, W.-C.; Hsu, C.-C.; Chao, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:38:00Z |
High-convergence-speed low-computation-complexity SVD algorithm for MIMO-OFDM systems
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AN-YEU(ANDY) WU; Wu, A.-Y.; Jheng, T.-J.; Chen, Y.-L.; Jheng, K.-Y.; Zhan, C.-Z.; Zhan, C.-Z.;Jheng, K.-Y.;Chen, Y.-L.;Jheng, T.-J.;Wu, A.-Y. |
| 臺大學術典藏 |
2018-09-10T07:38:00Z |
Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder
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Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; Tsai, T.-H.; AN-YEU(ANDY) WU; Lin, C.-H.;Chen, C.-Y.;Wu, A.-Y.;Tsai, T.-H. |
| 臺大學術典藏 |
2018-09-10T07:38:00Z |
Multilevel LINC system designs for power efficiency enhancement of transmitters
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Jheng, K.-Y.;Chen, Y.-J.;Wu, A.-Y.; Jheng, K.-Y.; Chen, Y.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:38:00Z |
PAC Duo SoC performance analysis with ESL design methodology
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Chuang, I.-Y.;Chang, C.-W.;Fan, T.-Y.;Yeh, J.-C.;Ji, K.-M.;Ma, J.-L.;Wu, A.-Y.;Lin, S.-Y.; Chuang, I.-Y.; Chang, C.-W.; Fan, T.-Y.; Yeh, J.-C.; Ji, K.-M.; Ma, J.-L.; Wu, A.-Y.; Lin, S.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:37:59Z |
A scalable built-in self-test/self-diagnosis architecture for 2D-mesh based chip multiprocessor systems
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Lin, S.-Y.;Hsu, C.-C.;Wu, A.-Y.; Lin, S.-Y.; Hsu, C.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
顯示項目 181-205 / 312 (共13頁)
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