English  |  正體中文  |  简体中文  |  Total items :2856600  
Visitors :  53475366    Online Users :  935
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"an yeu andy wu"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 266-275 of 312  (32 Page(s) Totally)
<< < 22 23 24 25 26 27 28 29 30 31 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2018-09-10T05:24:14Z A high-speed scalable shift-register based on-chip serial communication design for SoC applications Wang, W.; Wu, A.-Y.; AN-YEU(ANDY) WU; Wey, I.-C.; Chen, Y.-G.; Wu, C.-T.
臺大學術典藏 2018-09-10T05:24:14Z A memory-reduced Log-MAP kernel for turbo decoder AN-YEU(ANDY) WU; Wu, A.-Y.; Lin, C.-H.; Tsai, T.-H.
臺大學術典藏 2018-09-10T04:56:07Z Algorithms and architectures for split recursive least squares Liu, K.J.Ray;Wu, An-Yeu; Liu, K.J.Ray; Wu, An-Yeu; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:07Z Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:06Z Robust decision feedback equalizer design using soft-threshold-based multi-layer detection scheme Lin, C.-H.;Wu, A.-Y.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:06Z High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:06Z Multiplierless multirate decimator / interpolator module generator Jou, S.-J.;Jheng, K.-Y.;Chen, H.-Y.;Wu, A.-Y.; Jou, S.-J.; Jheng, K.-Y.; Chen, H.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:05Z A design flow for multiplierless linear-phase fir filters: From system specification to verilog code Jheng, K.-Y.; Jou, S.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:05Z A fast and power-saving self-timed manchester carry-bypass adder for booth multiplier-accumulator design Wey, I.-C.; Chow, H.-C.; Chen, Y.-G.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T04:56:05Z Academia-industry collaboration in SoC design education: Wishes and reality Mashiko, K.; Kanuma, A.; Kozawa, T.; Lee, K.; Wu, A.; Wang, Z.; AN-YEU(ANDY) WU

Showing items 266-275 of 312  (32 Page(s) Totally)
<< < 22 23 24 25 26 27 28 29 30 31 > >>
View [10|25|50] records per page