English  |  正體中文  |  简体中文  |  Total items :0  
Visitors :  50939633    Online Users :  1142
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"an yeu andy wu"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 91-115 of 312  (13 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2019-10-24T07:57:18Z A Unified View for Vector Rotational CORDIC Algorithms and Architectures based on Angle Quantization Approach 吳安宇;AN-YEU(ANDY) WU;Cheng-Shing Wu;An-Yeu Wu; An-Yeu Wu; Cheng-Shing Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:17Z Soft-Threshold-Based MultiLayer Decision Feedback Equalizer (STM-DFE) Algorithm and VLSI Architecture 吳安宇;AN-YEU(ANDY) WU;A.-Y. Wu;Chih-Hsiu Lin; Chih-Hsiu Lin; A.-Y. Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:17Z High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme 吳安宇;AN-YEU(ANDY) WU;Jyh-Ting (Justin) Lai;An-Yeu Wu;Meng-Da Yang; Meng-Da Yang; An-Yeu Wu; Jyh-Ting (Justin) Lai; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:17Z Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique 吳安宇;AN-YEU(ANDY) WU;Jyh-Ting Lai;An-Yeu Wu;Meng-Da Yang; Meng-Da Yang; An-Yeu Wu; Jyh-Ting Lai; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:17Z VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chih-Hsiu Lin;Ching-Hua Wen;Jen-Chih Kuo; Jen-Chih Kuo; Ching-Hua Wen; Chih-Hsiu Lin; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:16Z On The New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Fan-Min Li; Fan-Min Li; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:16Z Joint AGC-Equalization (Joint AGC-EQ) Algorithm and VLSI Architecture For Wirelined Transceiver Designs 吳安宇;AN-YEU(ANDY) WU;Chien-Hsiung Lee;An-Yeu Wu;Jyh-Ting Lai; Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:16Z Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems 吳安宇;AN-YEU(ANDY) WU;Jih-Chiang Yeo;An-Yeu Wu;Huai-Yi Hsu; Huai-Yi Hsu; An-Yeu Wu; Jih-Chiang Yeo; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:16Z Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Finite-Field Processing Element 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Jih-Chiang Yeo;Huai-Yi Hsu; Huai-Yi Hsu; Jih-Chiang Yeo; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:15Z An 8.29mm2 52mW Multi-mode LDPC Decoder Design for Mobile WiMAX System in 0.13um CMOS Process 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Cheng-Hung Lin;Cheng-Zhou Zhan;Xin-Yu Shih; Xin-Yu Shih; Cheng-Zhou Zhan; Cheng-Hung Lin; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:15Z A Systematic Design Approach on the Band-Tracking Packet Detector (BT-PD) for OFDM-Based UWB Systems 吳安宇;AN-YEU(ANDY) WU;Chien-Hsiung Lee;An-Yeu Wu;Jyh-Ting Lai; Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:14Z Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder 吳安宇; AN-YEU(ANDY) WU; Tsung-Han Tsai; An-Yeu Wu; Chun-Yu Chen; Cheng-Hung Lin; 吳安宇;AN-YEU(ANDY) WU;Tsung-Han Tsai;An-Yeu Wu;Chun-Yu Chen;Cheng-Hung Lin
臺大學術典藏 2019-10-24T07:57:14Z Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;You-Gang Chen;I-Chyn Wey; I-Chyn Wey; You-Gang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:14Z Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Cheng-Hung Lin;Fan-Min Li; Fan-Min Li; Cheng-Hung Lin; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:14Z Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Keng-Hsien Huang;Chih-hao Chao;Chun-Hsiang Huang;Shu-Yen Lin; Shu-Yen Lin; Chun-Hsiang Huang; Chih-hao Chao; Keng-Hsien Huang; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:13Z Generalized Pipelined Tomlinson–Harashima Precoder Design Methodology With Build-In Arbitrary Speed-Up Factors 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Yen-Liang Chen; Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:13Z Design and Implementation of Cost-Efficient Probabilistic-Based Noise-Tolerant VLSI Circuits 吳安宇;AN-YEU(ANDY) WU;Jie Chen;An-Yeu Wu;Chang-Hong Yu;You-Gang Chen;I-Chyn Wey; I-Chyn Wey; You-Gang Chen; Chang-Hong Yu; An-Yeu Wu; Jie Chen; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:12Z Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Yen-Liang Chen;Cheng-Zhou Zhan; Cheng-Zhou Zhan; Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:12Z Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chun-Yu Chen;Chen-Hung Lin; Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:12Z A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Wei Wang;Wen-Chung Shen;Chia-Tsun Wu; Chia-Tsun Wu; Wen-Chung Shen; Wei Wang; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:11Z Recon?gurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems 吳安宇;AN-YEU(ANDY) WU;An-Yeu (Andy) Wu;Ting-Jyun Jheng;Cheng-Zhou Zhan;Yen-Liang Chen; Yen-Liang Chen; Cheng-Zhou Zhan; Ting-Jyun Jheng; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:10Z Routing-Based Traffic Migration and Buffer Allocation Schemes for Three-Dimensional Network-on-Chip Systems with Thermal Limit 吳安宇;AN-YEU(ANDY) WU;An-Yeu (Andy) Wu;Kun-Chih Chen;Chih-Hao Chao; Chih-Hao Chao; Kun-Chih Chen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU; 吳安宇
臺大學術典藏 2019-10-24T07:57:10Z New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform Wen-Chung Shen; Hsiao-I Jen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU; 吳安宇; 吳安宇;AN-YEU(ANDY) WU;An-Yeu (Andy) Wu;Hsiao-I Jen;Wen-Chung Shen
臺大學術典藏 2019-10-24T07:57:10Z Dual-Mode Low-Complexity Codebook Searching Algorithm and VLSI Architecture for LTE/LTE-Advanced Systems 吳安宇; 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Cheng-Zhou Zhan;Chun-Yuan Chu;Yu-Hao Chen;Yi-Hsuan Lin; Yi-Hsuan Lin; Yu-Hao Chen; Chun-Yuan Chu; Cheng-Zhou Zhan; An-Yeu Wu; AN-YEU(ANDY) WU
臺大學術典藏 2019-10-24T07:57:09Z Path-Congestion-Aware Adaptive Routing with a Contention Prediction Scheme for Network-on-Chip Systems En-Jui Chang;Hsien-Kai Hsin;Shu-Yen Lin;An-Yeu (Andy) Wu; En-Jui Chang; Hsien-Kai Hsin; Shu-Yen Lin; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU; 吳安宇

Showing items 91-115 of 312  (13 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
View [10|25|50] records per page