| 臺大學術典藏 |
2018-09-10T15:00:43Z |
Design Technology Co-optimization for N10
|
P. Raghavan; R. Baert; M.G. Bardon; M. Dusa; A. Mallik; S. Sakhare; B. V; ewalle; P. Wambacq; B. Chava; K. Croes; M. Dehan; D. Jang; P. Leray; T.-T. Liu; K. Miyaguchi; B. Parvais; P. Schuddinck; P. Weemaes; A. Mercha; J. Bommels; N. Horiguch; J. Ryckaert; TSUNG-TE LIU et al. |
| 臺大學術典藏 |
2018-09-10T09:50:56Z |
TEASE: A Systematic Analysis Framework for Early Evaluation of FinFET-based Advanced Technology Nodes
|
P. Zuber; T.-T. Liu; B. Chava; B. Ballal; P. Royer; K. Croes; B. Rogier; R. Julien; A. Mercha; M. Badaroglu,; D. Verkest; A. Mallik; P. Zuber; T.-T. Liu; B. Chava; B. Ballal; P. Royer; K. Croes; B. Rogier; R. Julien; A. Mercha; M. Badaroglu; D. Verkest; TSUNG-TE LIU |
| 臺大學術典藏 |
2018-09-10T09:50:56Z |
TEASE: A Systematic Analysis Framework for Early Evaluation of FinFET-based Advanced Technology Nodes
|
P. Zuber; T.-T. Liu; B. Chava; B. Ballal; P. Royer; K. Croes; B. Rogier; R. Julien; A. Mercha; M. Badaroglu,; D. Verkest; A. Mallik; P. Zuber; T.-T. Liu; B. Chava; B. Ballal; P. Royer; K. Croes; B. Rogier; R. Julien; A. Mercha; M. Badaroglu; D. Verkest; TSUNG-TE LIU |
