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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2018-09-10T07:08:18Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique for SOC Application JAMES-B KUO; B. Chung; J. B. Kuo
臺大學術典藏 2018-09-10T06:02:16Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique B. Chung; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T06:02:15Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) for Designing High-Speed Low-Power SOC Applications Using 90nm MTCMOS Technology B. Chung; J. B. Kuo; JAMES-B KUO

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