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Institution Date Title Author
國立中山大學 2009 Process and design considerations for redistribution in wafer level chip size packaging technology for high power device applications J. Chen;Y.S. Lai;C.A. Hsieh;C.Y. Hu
國立中山大學 2009 Process and design considerations for redistribution in wafer level chip size packaging technology for high power device applications J. Chen;Y.S. Lai;C.A. Hsieh;C.Y. Hu
國立中山大學 2006 A Risk-Based Contingency Selection Method For SPS Applications T.Y. Hsiao; C.A. Hsieh; C.N. Lu

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