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Showing items 1-5 of 5 (1 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:37:09Z |
A compact model for electrostatic discharge protection nanoelectronics simulation
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Chou, Hung-Mu; Yu, Shao-Ming; Lee, Jam-Wem; Li, Yiming |
| 國立交通大學 |
2014-12-08T15:28:22Z |
Silicon-Germanium Structure in Surrounding-Gate Strained Silicon Nanowire Field Effect Transistors
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Li, Yiming; Lee, Jam-Wem; Chou, Hung-Mu |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Hybrid evolutionary approach to optimal design of CMOS LNA integrated circuits
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Li, Yiming; Chou, Hung-Mu |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Parallel simulation of deep sub-micron double-gate metal-oxide-semiconductor field effect transistors
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Yu, Shao-Ming; Chou, Hung-Mu; Lo, Shih-Ching |
| 國立交通大學 |
2014-12-08T15:14:47Z |
A floating gate design for electrostatic discharge protection circuits
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Chou, Hung-Mu; Lee, Jam-Wen; Li, Yiming |
Showing items 1-5 of 5 (1 Page(s) Totally)
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