|
English
|
正體中文
|
简体中文
|
2822924
|
|
???header.visitor??? :
30073779
???header.onlineuser??? :
1004
???header.sponsordeclaration???
|
|
|
???tair.name??? >
???browser.page.title.author???
|
"chou k i"???jsp.browse.items-by-author.description???
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2015-07-21T08:29:37Z |
Low-Voltage InGaZnO Thin Film Transistors with Small Sub-Threshold Swing
|
Cheng, C. H.; Chou, K. I.; Hsu, H. H. |
國立交通大學 |
2014-12-08T15:33:58Z |
Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure
|
Cheng, Chun-Hu; Chou, K. I.; Zheng, Zhi-Wei; Hsu, Hsiao-Hsuan |
國立交通大學 |
2014-12-08T15:31:00Z |
Gate-first n-MOSFET with a sub-0.6-nm EOT gate stack
|
Cheng, C. H.; Chou, K. I.; Chin, A. |
國立交通大學 |
2014-12-08T15:30:22Z |
Ni/GeOx/TiOy/TaN RRAM on Flexible Substrate With Excellent Resistance Distribution
|
Chou, K. I.; Cheng, C. H.; Zheng, Z. W.; Liu, Ming; Chin, Albert |
國立交通大學 |
2014-12-08T15:30:21Z |
Achieving low sub-0.6-nm EOT in gate-first n-MOSFET with TiLaO/CeO2 gate stack
|
Cheng, C. H.; Chou, K. I.; Chin, Albert |
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
|