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Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2018-08-21T05:56:48Z |
Heterogeneous Chip Power Delivery Modeling and Co-Synthesis for Practical 3DIC Realization
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Liao, Wei-Hsun; Lin, Chang-Tzu; Fang, Sheng-Hsin; Huang, Chien-Chia; Chen, Hung-Ming; Kwai, Ding-Ming; Chou, Yung-Fa |
國立交通大學 |
2018-08-21T05:56:36Z |
I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs
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Pan, Chi-Wen; Lee, Yu-Min; Huang, Pei-Yu; Yang, Chi-Ping; Lin, Chang-Tzu; Lee, Chia-Hsin; Chou, Yung-Fa; Kwai, Ding-Ming |
國立交通大學 |
2018-08-21T05:53:29Z |
3-D Stacked Technology of DRAM-Logic Controller Using Through-Silicon Via (TSV)
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Shen, Wen-Wei; Lin, Yu-Min; Chen, Shang-Chun; Chang, Hsiang-Hung; Chang, Tao-Chih; Lo, Wei-Chung; Lin, Chien-Chung; Chou, Yung-Fa; Kwai, Ding-Ming; Kao, Ming-Jer; Chen, Kuan-Neng |
國立交通大學 |
2017-04-21T06:49:39Z |
SRAM cell current in low leakage design
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Kwai, Ding-Ming; Hsiao, Ching-Hua; Kuo, Chung-Ping; Chuang, Chi-Hsien; Hsu, Min-Chung; Chen, Yi-Chun; Sung, Yu-Ling; Pan, Hsien-Yu; Lee, Chia-Hsin; Chang, Meng-Fan; Chou, Yung-Fa |
國立成功大學 |
2013-09 |
Reactivation of Spares for Off-Chip Memory Repair After Die Stacking in a 3-D IC With TSVs
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Chou, Yung-Fa; Kwai, Ding-Ming; Shieh, Ming-Der; Wu, Cheng-Wen |
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
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