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"chu yuan hua"的相关文件
显示项目 11-31 / 31 (共2页)
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| 國立交通大學 |
2017-04-21T06:50:17Z |
Invited: Wireless sensor nodes for environmental monitoring in Internet of Things
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Lu, Ting-Chou; Huang, Li-Ren; Lee, Yu; Tsai, Kun-Ju; Liao, Yu-Te; Cheng, Nai-Chen; Chu, Yuan-Hua; Tsai, Yi-Hsing; Chen, Fang-Chu; Chiueh, Tzi-Cker |
| 國立交通大學 |
2017-04-21T06:50:17Z |
Invited: Wireless sensor nodes for environmental monitoring in Internet of Things
|
Lu, Ting-Chou; Huang, Li-Ren; Lee, Yu; Tsai, Kun-Ju; Liao, Yu-Te; Cheng, Nai-Chen; Chu, Yuan-Hua; Tsai, Yi-Hsing; Chen, Fang-Chu; Chiueh, Tzi-Cker |
| 國立交通大學 |
2017-04-21T06:49:53Z |
An Ultra-Low Power Interface CMOS IC Design for Biosensor Applications
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Hu, Weibo; Liu, Yen-Ting; Das, Vighnesh; Schecht, Cliff; Tam Nguyen; Lie, Donald Y. C.; Yan, Tzu-Chao; Kuo, Chien-Nan; Wu, Stanley; Chu, Yuan-Hua; Yang, Tzu-Yi |
| 國立交通大學 |
2017-04-21T06:49:05Z |
Multiple Output Switched Capacitor DC-DC Converter with Capacitor Sharing for Sensor-Fusion Platforms
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Liang, Yu-Jie; Chen, Po-Ilung; Lu, Hung-Pin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:03Z |
An All-Digital Power Management Unit with 90% Power Efficiency and ns-order Voltage Transition Time for DVS Operation in Low Power Sensing SoC Applications
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Wu, Chung-Shiang; Lin, Kai-Chun; Kuo, Yi-Ping; Chen, Po-Hung; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Subthreshold SRAM Macro Design with Pulse-Controlled Dynamic Voltage Scaling (PC-DVS)
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Zhao, Jun-Kai; Chiu, Yi-Wei; Jou, Shyh-Jye; Chu, Yuan-Hua |
| 國立交通大學 |
2017-04-21T06:48:28Z |
All Digitally Controlled Linear Voltage Regulator with PMOS Strength Self-Calibration for Ripple Reduction
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Kuo, Yi-Ping; Huang, Po-Tsang; Wu, Chung-Shiang; Liang, Yu-Jie; Chuang, Ching-Te; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2016-03-28T00:05:45Z |
A 0.48V 0.57nJ/Pixel Video-Recording SoC in 65nm CMOS
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Lin, Tay-Jyi; Chien, Cheng-An; Chang, Pei-Yao; Chen, Ching-Wen; Wang, Po-Hao; Shyu, Ting-Yu; Chou, Chien-Yung; Luo, Shien-Chun; Guo, Jiun-In; Chen, Tien-Fu; Chuang, Gene C. H.; Chu, Yuan-Hua; Cheng, Liang-Chia; Su, Hong-Men; Jou, Chewnpu; Ieong, Meikei; Wu, Cheng-Wen; Wang, Jinn-Shyan |
| 國立交通大學 |
2015-12-02T02:59:25Z |
A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications
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Chang, Chia-Wen; Chu, Yuan-Hua; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T11:20:29Z |
Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells
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Luo, Shien-Chun; Chang, Kuo-Chiang; Chen, Ming-Pin; Huang, Ching-Ji; Chiu, Yi-Fang; Chen, Po-Hsun; Cheng, Liang-Chia; Liu, Chih-Wei; Chu, Yuan-Hua |
| 國立交通大學 |
2015-07-21T08:31:16Z |
An Ultra-Low Voltage Hearing Aid Chip using Variable-Latency Design Technique
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Chang, Kuo-Chiang; Luo, Shien-Chun; Huang, Ching-Ji; Liu, Chih-Wei; Chu, Yuan-Hua; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A DUAL-EDGED TRIGGERED EXPLICIT-PULSED LEVEL CONVERTING FLIP-FLOP WITH A WIDE OPERATION RANGE
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Chen, Mei-Wei; Chang, Ming-Hung; Wu, Pei-Chen; Kuo, Yi-Ping; Yang, Chun-Lin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:36:49Z |
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:34:51Z |
Batteryless 275mV Startup Single-Cell Photovoltaic Energy Harvesting System for Alleviating Shading Effect
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Huang, Chao-Jen; Su, Yi-Ping; Chen, Ke-Horng; Huang, Li-Ren; Chu, Fang-Chih; Chu, Yuan-Hua; Wey, Chin-Long |
| 國立交通大學 |
2014-12-08T15:23:45Z |
Self-Timed Torus Network with 1-of-5 Encoding
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Chang, Yuan-Teng; Huang, Man-Chen; Cheng, Wei-Min; Tsai, Hung-Yue; Chen, Chang-Jiu; Cheng, Fu-Chiung; Chu, Yuan-Hua |
| 國立交通大學 |
2014-12-08T15:12:02Z |
Parallel Architecture Core (PAC)-the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools
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Chang, David Chih-Wei; Lin, Tay-Jyi; Wu, Chung-Ju; Lee, Jenq-Kuen; Chu, Yuan-Hua; Wu, An-Yeu |
| 國立臺灣大學 |
2010 |
Energy-Efficient Real-Time Scheduling of Multimedia Tasks on Multi-Core Processors
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Wei, Yi-Hung; Yang, Chuan-Yue; Kuo, Tei-Wei; Hung, Shih-Hao; Chu, Yuan-Hua |
| 育達商業科技大學 |
2009 |
Self-Timed Torus Network with 1-of-5 Encoding
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Chang, Yuan-Teng;Huang, Man-Chen;Cheng, Wei-Min;Tsai, Hung-Yue;Chen, Chang-Jiu;Cheng, Fu-Chiung;Chu, Yuan-Hua |
| 淡江大學 |
2005-08-29 |
The New Approach of Programmable Pseudo Fractional-N Clock Generator for GHz Operation with 50% Duty Cycle
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Yang, Wei-bin; Kuo, Shu-chang; Chu, Yuan-hua; Cheng, Kuo-hsing |
| 淡江大學 |
1996-05 |
True-single-phase all-N-logic differential logic (TADL) for very high-speed complex VLSI
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Huang, Hong-yi; 鄭國興; Cheng, Kuo-hsing; Chu, Yuan-hua; Wu, Chung-yu |
| 淡江大學 |
1995-04-30 |
Low-voltage low-power CMOS true-single-phase clocking scheme with locally asynchronous logic circuits
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Huang, Hong-yi; 鄭國興; Cheng, Kuo-hsing; Wang, Jinn-shyan; Chu, Yuan-hua; Wu, Tain-shun; Wu, Chung-yu |
显示项目 11-31 / 31 (共2页)
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