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Showing items 26-35 of 57 (6 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:26:45Z |
ESD implantations in 0.18-mu m salicided CMOS technology for on-chip ESD protection with layout consideration
|
Ker, MD; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:26:43Z |
Layout design on multi-finger MOSFET for on-chip ESD protection circuits in a 0.18-mu m salicided CMOS process
|
Ker, MD; Chuang, CH; Lo, WY |
| 國立交通大學 |
2014-12-08T15:26:38Z |
ESD protection circuits with novel MOS-bounded diode structures
|
Ker, MD; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:26:34Z |
ESD protection design for mixed-voltage I/O circuit with substrate-triggered technique in sub-quarter-micron CMOS process
|
Ker, MD; Chuang, CH; Hsu, KC; Lo, WY |
| 國立交通大學 |
2014-12-08T15:26:21Z |
MOS-bounded diodes for on-chip ESD protection in a 0.15-mu m shallow-trench-isolation salicided CMOS process
|
Ker, MD; Lin, KH; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:19:40Z |
MOS-bounded diodes for on-chip ESD protection in deep submicron CMOS process
|
Ker, MD; Lin, KH; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:19:27Z |
Microstructural evolution and formation of highly c-axis-oriented aluminum nitride films by reactively magnetron sputtering deposition
|
Liu, WJ; Wu, SJ; Chen, CM; Lai, YC; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:19:14Z |
ESD implantations for on-chip ESD protection with layout consideration in 0.18-mu m salicided CMOS technology
|
Ker, MD; Chuang, CH; Lo, WY |
| 國立交通大學 |
2014-12-08T15:17:09Z |
ESD failure mechanisms of analog I/O cells in 0.18-mu m CMOS technology
|
Ker, MD; Chen, SH; Chuang, CH |
| 國家衛生研究院 |
2014-05-08 |
The combination of the prodrugs perforin-CEBPD and perforin-granzyme B efficiently enhances the activation of caspase signaling and kills prostate cancer
|
Chuang, CH;Wang, WJ;Li, CF;Ko, CY;Chou, YH;Chuu, CP;Cheng, TL;Wang, JM |
Showing items 26-35 of 57 (6 Page(s) Totally)
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