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"chuang ching te"的相关文件
显示项目 1-25 / 221 (共9页)
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| 國立交通大學 |
2019-12-13T01:12:54Z |
Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells
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Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-05-02T00:26:47Z |
0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process
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Chan, Yun-Sheng; Huang, Po-Tsang; Wu, Shang-Lin; Lung, Sheng-Chi; Wang, Wei-Chang; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-03T06:42:08Z |
Evaluation of Monolithic 3-D Logic Circuits and 6T SRAMs With InGaAs-n/Ge-p Ultra-Thin-Body MOSFETs
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Yu, Kuan-Chin; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T06:04:51Z |
28nm Near/Sub-Threshold Dual-Port FIFO Memory for Shared Queues in Multi-Sensor Applications
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Wu, Yi-Chun; Huang, Po-Tsang; Wu, Shang-Lin; Lung, Sheng-Chi; Wang, Wei-Chang; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T06:04:45Z |
Exploration and Evaluation of Low-Dropout Linear Voltage Regulator with FinFET, TFET and Hybrid TFET-FinFET Implementations.
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Chang, Chia-Ning; Chen, Yin-Nien; Huang, Po-Tsang; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:59:40Z |
SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage
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Mukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:59:08Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:58:12Z |
Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:58:09Z |
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:57:04Z |
A 64-CHANNEL WIRELESS NEURAL SENSING MICROSYSTEM WITH TSV-EMBEDDED MICRO-PROBE ARRAY FOR NEURAL SIGNAL ACQUISITION
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Huang, Yu-Chieh; Huang, Po-Tsang; Hu, Yu-Chen; Wu, Shang-Lin; You, Yan-Huei; Wang, Yung-Kuei; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2018-08-21T05:57:00Z |
An Implantable 128-Channel Wireless Neural-Sensing Microsystem using TSV-Embedded Dissolvable mu-Needle Array and Flexible Interposer
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Huang, Po-Tsang; Huang, Yu-Chieh; Wu, Shang-Lin; Hu, Yu-Chen; Lu, Ming-Wei; Sheng, Ting-Wei; Chang, Fung-Kai; Lin, Chun-Pin; Chang, Nien-Shang; Chen, Hung-Lieh; Chen, Chi-Shi; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2018-08-21T05:56:55Z |
Ultra-Low Voltage Mixed TFET-MOSFET 8T SRAM Cell
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Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Impacts of Work Function Variation and Line Edge Roughness on Hybrid TFET-MOSFET Monolithic 3D SRAMs
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Wang, Jian-Hao; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Evaluation of Analog Performance of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) MOSFETs
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Lee, Hung-Yi; Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Performance Evaluation of Pass-Transistor-Based Circuits using Monolayer and Bilayer 2-D Transition Metal Dichalcogenide (TMD) MOSFETs for 5.9nm Node
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Yu, Chang-Hung; Zheng, Jun-Teng; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Exploration and Evaluation of TCAM with Hybrid Tunneling FET and FinFET Devices for Ultra-Low-Voltage Applications
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Tu, Meng-Hsuan; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:48Z |
Area-Power-Efficient 11-Bit Hybrid Dual-Vdd ADC with Self-Calibration for Neural Sensing Application
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Chen, Jr-Ming; Huang, Po-Tsang; Wu, Shang-Lin; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:54:15Z |
A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist
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Wu, Shang-Lin; Li, Kuang-Yu; Huang, Po-Tsang; Hwang, Wei; Tu, Ming-Hsien; Lung, Sheng-Chi; Peng, Wei-Sheng; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:53:58Z |
Performance and Stability Benchmarking of Monolithic 3-D Logic Circuits and SRAM Cells With Monolayer and Few-Layer Transition Metal Dichalcogenide MOSFETs
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Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:53:55Z |
An Advanced 2.5-D Heterogeneous Integration Packaging for High-Density Neural Sensing Microsystem
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Hu, Yu-Chen; Huang, Yu-Chieh; Huang, Po-Tsang; Wu, Shang-Lin; Chang, Hsiao-Chun; Yang, Yu-Tao; You, Yan-Huei; Chen, Jr-Ming; Huang, Yan-Yu; Lin, Yen-Han; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chuang, Ching-Te; Chiou, Jin-Chern; Chen, Kuan-Neng |
| 國立交通大學 |
2018-08-21T05:53:09Z |
Ultrahigh-Density 256-Channel Neural Sensing Microsystem Using TSV-Embedded Neural Probes
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Huang, Yu-Chieh; Huang, Po-Tsang; Wu, Shang-Lin; Hu, Yu-Chen; You, Yan-Huei; Chen, Jr-Ming; Huang, Yan-Yu; Chang, Hsiao-Chun; Lin, Yen-Han; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2018-01-24T07:42:38Z |
應用於可植入式神經感測微系統之低功率無線資料傳輸
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張峰榿; 莊景德; Chang, Feng-Kai; Chuang, Ching-Te |
| 國立交通大學 |
2018-01-24T07:42:16Z |
應用於高密度神經感測之低功率神經訊號放大器
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何寬倫; 莊景德; 黃威; Ho,Kuan-Lun; Chuang,Ching-Te; Hwang,Wei |
| 國立交通大學 |
2018-01-24T07:42:16Z |
應用於物聯網之28奈米4kb 1寫2讀次臨界施密特觸發器先進先出隨機靜態存取記憶體設計
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曾煥然; 莊景德; 黃威; Tseng, Huan-Jan; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2018-01-24T07:42:01Z |
28奈米近臨界電壓使用12顆電晶體搭配短反或閘型匹配線之管線化的三態內容可定址記憶體
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陳俊丞; 莊景德; 黃威; Chen, Jyun-Cheng; Chuang, Ching-Te; Hwang, Wei |
显示项目 1-25 / 221 (共9页)
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