English  |  正體中文  |  简体中文  |  总笔数 :0  
造访人次 :  51953468    在线人数 :  936
教育部委托研究计画      计画执行:国立台湾大学图书馆
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
关于TAIR

浏览

消息

著作权

相关连结

"chuang ching te"的相关文件

回到依作者浏览
依题名排序 依日期排序

显示项目 151-175 / 221 (共9页)
<< < 1 2 3 4 5 6 7 8 9 > >>
每页显示[10|25|50]项目

机构 日期 题名 作者
國立交通大學 2014-12-08T15:38:26Z Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:38:09Z SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage Mukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te
國立交通大學 2014-12-08T15:37:44Z Impacts of gate-oxide breakdown on power-gated SRAM Yang, Hao-I; Hwang, Wei; Chuang, Ching-Te
國立交通大學 2014-12-08T15:36:58Z Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:36:49Z 40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te
國立交通大學 2014-12-08T15:36:16Z Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:36:13Z A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te
國立交通大學 2014-12-08T15:36:11Z FinFET SRAM Cell Optimization Considering Temporal Variability due to NBTI/PBTI and Surface Orientation Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:35:52Z Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits Fan, Ming-Long; Yang, Shao-Yu; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:35:47Z Area-Power-Efficient 11-Bit SAR ADC with Delay-Line Enhanced Tuning for Neural Sensing Applications Huang, Teng-Chieh; Huang, Po-Tsang; Wu, Shang-Lin; Chen, Kuan-Neng; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei
國立交通大學 2014-12-08T15:35:46Z Low Temperature (< 180 degrees C) Wafer-level and Chip-level In-to-Cu and Cu-to-Cu Bonding for 3D Integration Chien, Yu-San; Huang, Yan-Pin; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:35:46Z Multi-Layer Adaptive Power Management Architecture for TSV 3DIC Applications Chang, Ming-Hung; Hsieh, Wei-Chih; Wu, Pei-Chen; Chuang, Ching-Te; Chen, Kuan-Neng; Wang, Chen-Chao; Ting, Chun-Yen; Chen, Kua-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Hwang, Wei
國立交通大學 2014-12-08T15:35:45Z A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang
國立交通大學 2014-12-08T15:35:44Z Near-/Sub-V-th Process, Voltage, and Temperature (PVT) Sensors with Dynamic Voltage Selection Chang, Ming-Hung; Lin, Shang-Yuan; Wu, Pei-Chen; Zakoretska, Olesya; Chuang, Ching-Te; Chen, Kuan-Neng; Wang, Chen-Chao; Chen, Kua-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Hwang, Wei
國立交通大學 2014-12-08T15:35:28Z Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors Wang, Dao-Ping; Lin, Hon-Jarn; Chuang, Ching-Te; Hwang, Wei
國立交通大學 2014-12-08T15:35:19Z Low-Temperature Bonded Cu/In Interconnect With High Thermal Stability for 3-D Integration Chien, Yu-San; Huang, Yan-Pin; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chiu, Chi-Tsung; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:35:18Z Impacts of Single Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits Yang, Shao-Yu; Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:35:16Z Low Temperature (< 180 degrees C) Bonding for 3D Integration Huang, Yan-Pin; Tzeng, Ruoh-Ning; Chien, Yu-San; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chuang, Ching-Te; Hwang, Wei; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:35:05Z A TSV-Based Bio-Signal Package With mu-Probe Array Chou, Lei-Chun; Lee, Shih-Wei; Huang, Po-Tsang; Chang, Chih-Wei; Chiang, Cheng-Hao; Wu, Shang-Lin; Chuang, Ching-Te; Chiou, Jin-Chern; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:33:26Z Novel Cu-to-Cu Bonding With Ti Passivation at 180 degrees C in 3-D Integration Huang, Yan-Pin; Chien, Yu-San; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chiu, Chi-Tsung; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:33:15Z Impacts of NBTI/PBTI on Timing Control Circuits and Degradation Tolerant Design in Nanoscale CMOS SRAM Yang, Hao-I.; Yang, Shyh-Chyi; Hwang, Wei; Chuang, Ching-Te
國立交通大學 2014-12-08T15:32:43Z Analysis of Germanium FinFET Logic Circuits and SRAMs with Asymmetric Gate to Source/Drain Underlap Devices Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:32:43Z Design and Optimization of 6T SRAM using Vertically Stacked Nanowire MOSFETs Tsai, Ming-Fu; Fan, Ming-Long; Pao, Chia-Hao; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:32:20Z Comparative Leakage Analysis of GeOI FinFET and Ge Bulk FinFET Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:32:12Z Investigation of Single-Trap-Induced Random Telegraph Noise for Tunnel FET Based Devices, 8T SRAM Cell, and Sense Amplifiers Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te

显示项目 151-175 / 221 (共9页)
<< < 1 2 3 4 5 6 7 8 9 > >>
每页显示[10|25|50]项目