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"chuang ching te"的相关文件
显示项目 81-90 / 221 (共23页) << < 4 5 6 7 8 9 10 11 12 13 > >> 每页显示[10|25|50]项目
| 國立交通大學 |
2015-07-21T11:20:55Z |
Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices
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Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T11:20:52Z |
2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications
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Huang, Po-Tsang; Wu, Shang-Lin; Huang, Yu-Chieh; Chou, Lei-Chun; Huang, Teng-Chieh; Wang, Tang-Hsuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:30Z |
2.5D Heterogeneously Integrated Bio-Sensing Microsystem for Multi-Channel Neural-Sensing Applications
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Huang, Po-Tsang; Chou, Lei-Chun; Huang, Teng-Chieh; Wu, Shang-Lin; Wang, Tang-Shuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chen, Kuan-Neng; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Cheng, Ming-Hsiang; Lin, Yueh-Lung; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:27Z |
Evaluation of Read-and Write-Assist Circuits for GeOI FinFET 6T SRAM Cells
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T08:31:17Z |
Energy-Efficient Configurable Discrete Wavelet Transform for Neural Sensing Applications
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Wang, Tang-Hsuan; Huang, Po-Tsang; Chen, Kuan-Neng; Chiou, Jin-Chem; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:31:16Z |
Investigation and Optimization of Monolithic 3D Logic Circuits and SRAM Cells Considering Interlayer Coupling
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T08:31:11Z |
Evaluation of Transient Voltage Collapse Write-Assist for GeOI and SOI FinFET SRAM Cells
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
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Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2015-07-21T08:30:59Z |
Method for Resolving Simultaneous Same-Row Access In Dual-Port 8T SRAM with Asynchronous Dual-Clock Operation
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Lien, Nan-Chun; Chuang, Ching-Te; Wu, Wen-Rang |
| 國立交通大學 |
2015-07-21T08:30:58Z |
A Disturb-Free Subthreshold 9T SRAM Cell With Improved Performance and Variation Tolerance
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Lu, Chien-Yu; Chuang, Ching-Te |
显示项目 81-90 / 221 (共23页) << < 4 5 6 7 8 9 10 11 12 13 > >> 每页显示[10|25|50]项目
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