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"chuang ching te"的相關文件
顯示項目 6-15 / 221 (共23頁)
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| 國立交通大學 |
2019-04-02T05:59:40Z |
SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage
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Mukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:59:08Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:58:12Z |
Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-02T05:58:09Z |
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:57:04Z |
A 64-CHANNEL WIRELESS NEURAL SENSING MICROSYSTEM WITH TSV-EMBEDDED MICRO-PROBE ARRAY FOR NEURAL SIGNAL ACQUISITION
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Huang, Yu-Chieh; Huang, Po-Tsang; Hu, Yu-Chen; Wu, Shang-Lin; You, Yan-Huei; Wang, Yung-Kuei; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2018-08-21T05:57:00Z |
An Implantable 128-Channel Wireless Neural-Sensing Microsystem using TSV-Embedded Dissolvable mu-Needle Array and Flexible Interposer
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Huang, Po-Tsang; Huang, Yu-Chieh; Wu, Shang-Lin; Hu, Yu-Chen; Lu, Ming-Wei; Sheng, Ting-Wei; Chang, Fung-Kai; Lin, Chun-Pin; Chang, Nien-Shang; Chen, Hung-Lieh; Chen, Chi-Shi; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2018-08-21T05:56:55Z |
Ultra-Low Voltage Mixed TFET-MOSFET 8T SRAM Cell
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Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Impacts of Work Function Variation and Line Edge Roughness on Hybrid TFET-MOSFET Monolithic 3D SRAMs
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Wang, Jian-Hao; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Evaluation of Analog Performance of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) MOSFETs
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Lee, Hung-Yi; Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Performance Evaluation of Pass-Transistor-Based Circuits using Monolayer and Bilayer 2-D Transition Metal Dichalcogenide (TMD) MOSFETs for 5.9nm Node
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Yu, Chang-Hung; Zheng, Jun-Teng; Su, Pin; Chuang, Ching-Te |
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