English  |  正體中文  |  简体中文  |  總筆數 :0  
造訪人次 :  51593453    線上人數 :  887
教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
關於TAIR

瀏覽

消息

著作權

相關連結

"chung cheng ting"的相關文件

回到依作者瀏覽
依題名排序 依日期排序

顯示項目 1-17 / 17 (共1頁)
1 
每頁顯示[10|25|50]項目

機構 日期 題名 作者
國立交通大學 2019-04-03T06:47:55Z Nearly Dislocation-free Ge/Si Heterostructures by Using Nanoscale Epitaxial Growth Method Luo, Guang-Li; Ko, Chih-Hsin; Wann, Clement H.; Chung, Cheng-Ting; Han, Zong-You; Cheng, Chao-Ching; Chang, Chun-Yen; Lin, Hau-Yu; Chien, Chao-Hsin
國立交通大學 2018-08-21T05:54:30Z Fully Depleted GeOI-Channel Junctionless pMOSFET with a Low-Resistance-Raised NiGe Alloy S/D Lee, Wei-Li; Hsu, Chung-Chun; Chung, Cheng-Ting; Lu, Yu-Hung; Luo, Guang-Li; Chien, Chao-Hsin
國立交通大學 2017-04-21T06:49:40Z A Comprehensive Study of Ge1-xSix on Ge for the Ge nMOSFETs with Tensile Stress, Shallow Junctions and Reduced Leakage Luo, Guang-Li; Huang, Shih-Chiang; Chung, Cheng-Ting; Heh, Dawei; Chien, Chao-Hsin; Cheng, Chao-Ching; Lee, Yao-Jen; Wu, Wen-Fa; Hsu, Chiung-Chih; Kuo, Mei-Ling; Yao, Jay-Yi; Chang, Mao-Nan; Liu, Chee-Wee; Hu, Chenming; Chang, Chun-Yen; Yang, Fu-Liang
國立交通大學 2017-04-21T06:48:53Z Ge Channel MOSFETs Directly on Silicon Chen, Che Wei; Chung, Cheng-Ting; Chien, Chao Hsin
國立交通大學 2015-12-04T07:03:15Z SEMICONDUCTOR DEVICE AND FORMATION THEREOF Chien Chao-Hsin; Chung Cheng-Ting; Chen Che-Wei
國立交通大學 2014-12-12T02:45:00Z 高介電材料於鍺基板及異質磊晶鍺元件於矽平台之研究 鍾政庭; Chung, Cheng-Ting; 簡昭欣; 羅廣禮; Chien, Chao-Hsin; Luo, Guang-Li
國立交通大學 2014-12-08T15:36:59Z High-Performance Germanium p- and n-MOSFETs With NiGe Source/Drain Chen, Che-Wei; Tzeng, Ju-Yuan; Chung, Cheng-Ting; Chien, Hung-Pin; Chien, Chao-Hsin; Luo, Guang-Li
國立交通大學 2014-12-08T15:33:55Z Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation Chen, Che-Wei; Tzeng, Ju-Yuan; Chung, Cheng-Ting; Chien, Hung-Pin; Chien, Chao-Hsin; Luo, Guang-Li; Wang, Pei-Yu; Tsui, Bing-Yue
國立交通大學 2014-12-08T15:33:55Z Body-Tied Germanium Tri-Gate Junctionless PMOSFET With In-Situ Boron Doped Channel Chen, Che-Wei; Chung, Cheng-Ting; Tzeng, Ju-Yuan; Chang, Pang-Sheng; Luo, Guang-Li; Chien, Chao-Hsin
國立交通大學 2014-12-08T15:30:46Z First Experimental Ge CMOS FinFETs Directly on SOI Substrate Chung, Cheng-Ting; Chen, Che-Wei; Lin, Jyun-Chih; Wu, Che-Chen; Chien, Chao-Hsin; Luo, Guang-Li
國立交通大學 2014-12-08T15:30:35Z Epitaxial Germanium on SOI Substrate and Its Application of Fabricating High I-ON/I-OFF Ratio Ge FinFETs Chung, Cheng-Ting; Chen, Che-Wei; Lin, Jyun-Chih; Wu, Che-Chen; Chien, Chao-Hsin; Luo, Guang-Li; Kei, Chi-Chung; Hsiao, Chien-Nan
國立交通大學 2014-12-08T15:30:22Z Germanium N and P Multifin Field-Effect Transistors With High-Performance Germanium (Ge) p(+)/n and n(+)/p Heterojunctions Formed on Si Substrate Chen, Che-Wei; Chung, Cheng-Ting; Tzeng, Ju-Yuan; Li, Pin-Hui; Chang, Pang-Sheng; Chien, Chao-Hsin; Luo, Guang-Li
國立交通大學 2014-12-08T15:29:33Z High On/Off Ratio and Very Low Leakage in p(+)/n and n(+)/p Germanium/Silicon Heterojunction Diodes Chen, Che-Wei; Chung, Cheng-Ting; Lin, Jyun-Chih; Luo, Guang-Li; Chien, Chao-Hsin
國立交通大學 2014-12-08T15:28:27Z Body-Tied Germanium FinFETs Directly on a Silicon Substrate Chen, Che-Wei; Chung, Cheng-Ting; Luo, Guang-Li; Chien, Chao-Hsin
國立交通大學 2014-12-08T15:10:19Z The Annihilation of Threading Dislocations in the Germanium Epitaxially Grown within the Silicon Nanoscale Trenches Luo, Guang-Li; Huang, Shih-Chiang; Ko, Chih-Hsin; Wann, Clement H.; Chung, Cheng-Ting; Han, Zong-You; Cheng, Chao-Ching; Chang, Chun-Yen; Lin, Hau-Yu; Chien, Chao-Hsin
國立交通大學 2014-12-08T15:07:51Z Ge Epitaxial Growth on GaAs Substrates for Application to Ge-Source/Drain GaAs MOSFETs Luo, Guang-Li; Han, Zong-You; Chien, Chao-Hsin; Ko, Chih-Hsin; Wann, Clement H.; Lin, Hau-Yu; Shen, Yi-Ling; Chung, Cheng-Ting; Huang, Shih-Chiang; Cheng, Chao-Ching; Changb, Chun-Yen
國立政治大學 2012 數位國會與電子民主:立法院應用資訊通訊科技與公民互動之研究 鍾政廷; Chung, Cheng Ting

顯示項目 1-17 / 17 (共1頁)
1 
每頁顯示[10|25|50]項目