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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"chung ching che"的相關文件
顯示項目 1-10 / 14 (共2頁)
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| 國立交通大學 |
2014-12-16T06:15:38Z |
Digital Loop Filter for All-Digital Phase-Locked Loop Design
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Lee, Chen-yi; Chung, Ching-che |
| 國立交通大學 |
2014-12-08T15:47:32Z |
An All Digital Spread Spectrum Clock Generator with Programmable Spread Ratio for SoC Applications
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Sheng, Duo; Chung, Ching-Che; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:33:45Z |
A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications
|
Sheng, Duo; Chung, Ching-Che; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:29:35Z |
A 90 nm All-digital Smart Temperature Sensor with Wireless Body Area Network Baseband Transceiver for Biotelemetry Applications
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Chung, Ching-Che; Yu, Jui-Yuan; Jang, Shiou-Ru; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:28:14Z |
A Low-Power DCO Using Interlaced Hysteresis Delay Cells
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Yu, Chien-Ying; Chung, Ching-Che; Yu, Chia-Jung; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:25:07Z |
An all-digital delay-locked loop for DDR SDRAM controller applications
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Chung, Ching-Che; Chen, Pao-Lung; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:25:07Z |
An all-digital phase-locked loop with high-resolution for SoC applications
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Sheng, Duo; Chung, Ching-Che; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:25:04Z |
A fast-lock-in ADPLL with high-resolution and low-power DCO for SoC applications
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Sheng, Duo; Chung, Ching-Che; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:24:57Z |
Design of a 125 mu W, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applications
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Liu, Tsu-Ming; Chung, Ching-Che; Lee, Chen-Yi; Lin, Ting-An; Wang, Sheng-Zen |
| 國立交通大學 |
2014-12-08T15:13:09Z |
An ultra-low-power and portable digitally controlled oscillator for SoC applications
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Sheng, Duo; Chung, Ching-Che; Lee, Chen-Yi |
顯示項目 1-10 / 14 (共2頁)
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