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Showing items 1-50 of 69  (2 Page(s) Totally)
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Institution Date Title Author
國家衛生研究院 2024-10-28 Electronegative ApoCIII-Rich HDL promotes cellular damage and vascular aging Hsu, WL;Tsai, MH;Chung, CP;Vadhan, A;Wei, WY;Akyol, O;Chiang, HH;Kraler, S;Luscher, TF;Chen, CH
國家衛生研究院 2024-08-13 Dissecting the vascular-cognitive nexus: energetic vs. conventional hemodynamic parameters[Erratum:Hypertension Research. 2024 Jul 09;47:2262-2274.] Cheng, HM;Wang, JJ;Chuang, SY;Lin, CH;Mitchell, GF;Huang, CJ;Wang, PN;Chung, CP;Chen, LK;Pan, WH;Peng, LN;Chen, CH
國家衛生研究院 2024-07-09 Dissecting the vascular-cognitive nexus: energetic vs. conventional hemodynamic parameters Cheng, HM;Wang, JJ;Chuang, SY;Lin, CH;Mitchell, GF;Huang, CJ;Wang, PN;Chung, CP;Chen, LK;Pan, WH;Peng, LN;Chen, CH
國家衛生研究院 2023-05 NOTCH2NLC GGC repeat expansion in patients with vascular leukoencephalopathy Liao, YC;Wei, CY;Chang, FP;Chou, YT;Hsu, SL;Chung, CP;Mizuguchi, T;Matsumoto, N;Yet, SF;Lee, YC
國家衛生研究院 2022-01-31 Associations between cerebral vasoreactivity and cognitive function in the middle-aged non-demented population Chen, WT;Chi, NF;Cheng, HM;Ko, YT;Chuang, SY;Pan, WH;Chen, CH;Chung, CP;Wang, PN
國家衛生研究院 2020-08-01 Associations of blood pressure and carotid flow velocity with brain volume and cerebral small vessel disease in a community-based population Chuang, SY;Wang, PN;Chen, LK;Chou, KH;Chung, CP;Chen, CH;Mitchell, GF;Pan, WH;Cheng, HM
國立交通大學 2019-04-02T05:59:24Z Memory system design in superscalar processing Lu, NP; Chung, CP
國立交通大學 2019-04-02T05:59:14Z BENCHMARKING AND ANALYSIS OF SUPERSCALAR ARCHITECTURE SHIAU, YH; CHUNG, CP
國立交通大學 2014-12-08T15:48:55Z Parallelism exploitation in superscalar multiprocessing Lu, NP; Chung, CP
國立交通大學 2014-12-08T15:48:45Z Stack operations folding in Java processors Chang, LC; Ton, LR; Kao, MF; Chung, CP
國立交通大學 2014-12-08T15:46:15Z Instruction cache prefetching directed by branch prediction Chiu, JC; Shiu, RM; Chi, SA; Chung, CP
國立交通大學 2014-12-08T15:46:07Z Reducing memory traffic and accelerating prolog execution in a superscalar prolog system Ma, RL; Chung, CP
國立交通大學 2014-12-08T15:45:55Z Exploiting Java bytecode parallelism by enhanced POC folding model Ton, LR; Chang, LC; Chung, CP
國立交通大學 2014-12-08T15:45:37Z Fault-tolerant gamma interconnection networks by chaining Chen, CW; Lu, NP; Chen, TF; Chung, CP
國立交通大學 2014-12-08T15:45:16Z Applying stack simulation for branch target buffers Shiu, RM; Lu, NP; Chung, CP
國立交通大學 2014-12-08T15:44:41Z Enhancing Java processor performance with smart dynamic folding Chang, LC; Ton, LR; Kao, MF; Chung, CP
國立交通大學 2014-12-08T15:43:55Z High-bandwidth x86 instruction fetching based on instruction pointer table Chiu, JC; Chung, CP
國立交通大學 2014-12-08T15:43:32Z Fault-tolerant gamma interconnection network without backtracking Chen, CW; Chung, CP
國立交通大學 2014-12-08T15:43:27Z A dominance relation enhanced branch-and-bound task allocation Ma, YC; Chung, CP
國立交通大學 2014-12-08T15:43:00Z Code compression techniques using operand field remapping Lin, K; Chung, CP
國立交通大學 2014-12-08T15:42:28Z Design of instruction address queue for high degree x86 superscalar architectures Chiu, JC; Wang, MJY; Chung, CP
國立交通大學 2014-12-08T15:42:04Z Posting file partitioning and parallel information retrieval Ma, YC; Chen, TF; Chung, CP
國立交通大學 2014-12-08T15:42:02Z An analytical POC stack operations folding for continuous and discontinuous Java bytecodes Ton, LR; Chang, LC; Chung, CP
國立交通大學 2014-12-08T15:41:45Z Design of an optimal folding mechanism for Java processors Ton, LR; Chang, LC; Shann, JJ; Chung, CP
國立交通大學 2014-12-08T15:41:27Z Inverted file compression through document identifier reassignment Shieh, WY; Chen, TF; Shann, JJJ; Chung, CP
國立交通大學 2014-12-08T15:40:53Z Variable-size data item placement for load and storage balancing Ma, YC; Chiu, JC; Chen, TF; Chung, CP
國立交通大學 2014-12-08T15:40:52Z 3-disjoint gamma interconnection networks Chen, CW; Lu, NP; Chung, CP
國立交通大學 2014-12-08T15:40:44Z An inverted file cache for fast information retrieval Shieh, WY; Shann, JJJ; Chung, CP
國立交通大學 2014-12-08T15:38:46Z A software/hardware cooperated stack operations folding model for Java processors Ton, LR; Chang, LC; Shann, JJ; Chung, CP
國立交通大學 2014-12-08T15:37:20Z Branch-and-bound task allocation with task clustering-based pruning Ma, YC; Chen, TF; Chung, CP
國立交通大學 2014-12-08T15:27:59Z ANALYZING CACHE PERFORMANCE ON MULTI-STREAM EXECUTION PROCESSOR LIN, CZ; TSENG, CC; CHUNG, CP
國立交通大學 2014-12-08T15:27:37Z Register renaming for x86 superscalar design Liu, CC; Shiu, RM; Chung, CP
國立交通大學 2014-12-08T15:27:30Z Instruction cache prefetching with extended BTB Chi, SA; Shiu, RM; Chiu, JC; Chang, SE; Chung, CP
國立交通大學 2014-12-08T15:27:25Z Instruction folding in Java processor Ton, LR; Chang, LC; Rao, MF; Tseng, HM; Shang, SS; Ma, RL; Wang, DC; Chung, CP
國立交通大學 2014-12-08T15:27:03Z Design of instruction stream buffer with trace support for x86 processors Chiu, JC; Huang, IH; Chung, CP
國立交通大學 2014-12-08T15:26:35Z Code compression by register operand dependency Lin, K; Shann, JJJ; Chung, CP
國立交通大學 2014-12-08T15:26:14Z A statistics-based approach to incrementally update inverted files Shieh, WY; Chung, CP
國立交通大學 2014-12-08T15:26:14Z A tree-based inverted file for fast ranked-document retrieval Shieh, WY; Chen, TF; Chung, CP
國立交通大學 2014-12-08T15:25:51Z A unique-order interpolative code for fast querying and space-efficient indexing in information retrieval systems Cheng, CS; Shann, JJJ; Chung, CP
國立交通大學 2014-12-08T15:25:38Z Low-power BIBITS encoding with register relabeling for instruction bus Cheng, CT; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF
國立交通大學 2014-12-08T15:25:28Z Low-power data address bus encoding method Weng, TH; Chiao, WH; Shann, JJJ; Chung, CP; Lu, J
國立交通大學 2014-12-08T15:25:28Z Low-power branch prediction Hu, YC; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF
國立交通大學 2014-12-08T15:19:35Z A statistics-based approach to incrementally update inverted files Shieh, WY; Chung, CP
國立交通大學 2014-12-08T15:18:20Z Designing a disjoint paths interconnection network with fault tolerance and collision solving Chen, CW; Chung, CP
國立交通大學 2014-12-08T15:17:20Z Unique-order interpolative coding for fast querying and space-efficient indexing in information retrieval systems Cheng, CS; Shann, JJJ; Chung, CP
國立交通大學 2014-12-08T15:16:46Z Fast query evaluation through document identifier assignment for inverted file-based information retrieval systems Cheng, CS; Chung, CP; Shann, JJJ
國立交通大學 2014-12-08T15:05:24Z DUAL-ALU CRISC ARCHITECTURE AND ITS COMPILING TECHNIQUE CHOU, HC; CHUNG, CP; CHENG, SC
國立交通大學 2014-12-08T15:04:57Z A BOUND ANALYSIS OF SCHEDULING INSTRUCTIONS ON PIPELINED PROCESSORS WITH A MAXIMAL DELAY OF ONE CYCLE CHOU, HC; CHUNG, CP
國立交通大學 2014-12-08T15:04:55Z ADOPTABILITY AND EFFECTIVENESS OF MICROCODE COMPACTION ALGORITHMS IN SUPERSCALAR PROCESSING SHIAU, YH; CHUNG, CP
國立交通大學 2014-12-08T15:04:42Z MODELING OF SUPERSCALAR INSTRUCTION SCHEDULING AND ANALYSIS OF A HEURISTIC SCHEDULING ALGORITHM CHOU, HC; CHUNG, CP

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