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Showing items 41-50 of 69 (7 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power data address bus encoding method
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Weng, TH; Chiao, WH; Shann, JJJ; Chung, CP; Lu, J |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power branch prediction
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Hu, YC; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF |
| 國立交通大學 |
2014-12-08T15:19:35Z |
A statistics-based approach to incrementally update inverted files
|
Shieh, WY; Chung, CP |
| 國立交通大學 |
2014-12-08T15:18:20Z |
Designing a disjoint paths interconnection network with fault tolerance and collision solving
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Chen, CW; Chung, CP |
| 國立交通大學 |
2014-12-08T15:17:20Z |
Unique-order interpolative coding for fast querying and space-efficient indexing in information retrieval systems
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Cheng, CS; Shann, JJJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:16:46Z |
Fast query evaluation through document identifier assignment for inverted file-based information retrieval systems
|
Cheng, CS; Chung, CP; Shann, JJJ |
| 國立交通大學 |
2014-12-08T15:05:24Z |
DUAL-ALU CRISC ARCHITECTURE AND ITS COMPILING TECHNIQUE
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CHOU, HC; CHUNG, CP; CHENG, SC |
| 國立交通大學 |
2014-12-08T15:04:57Z |
A BOUND ANALYSIS OF SCHEDULING INSTRUCTIONS ON PIPELINED PROCESSORS WITH A MAXIMAL DELAY OF ONE CYCLE
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CHOU, HC; CHUNG, CP |
| 國立交通大學 |
2014-12-08T15:04:55Z |
ADOPTABILITY AND EFFECTIVENESS OF MICROCODE COMPACTION ALGORITHMS IN SUPERSCALAR PROCESSING
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SHIAU, YH; CHUNG, CP |
| 國立交通大學 |
2014-12-08T15:04:42Z |
MODELING OF SUPERSCALAR INSTRUCTION SCHEDULING AND ANALYSIS OF A HEURISTIC SCHEDULING ALGORITHM
|
CHOU, HC; CHUNG, CP |
Showing items 41-50 of 69 (7 Page(s) Totally)
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