臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T07:43:08Z	Fast and Exact Simultaneous Gate and Wire Sizing by Lagrangian Relaxation	Chung-Ping Chen; Chris C. N. Chu; D. F. Wong; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T07:43:08Z	Noise-Aware Repeater Insertion and Wire-Sizing for On-chip Interconnect Using Hierarchical Moment-Matching	Chung-Ping Chen; N. Menezes; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T07:43:08Z	Error-bounded Pade Approximation via Bilinear Conformal Transformation	Chung-Ping Chen; D.F. Wong; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:25Z	Statistical Timing Analysis Driven Post-Silicon-Tunable Clock-Tree Synthesis	Jeng-Liang Tsai; Lizheng Zhang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:25Z	ConvexFit: An Optimal Minimum-Error Convex Fitting and Smoothing Algorithm with Application to Gate-Sizing	Sanghamitra Roy; Weijen Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:25Z	Efficient Statistical Capacitance Variability Modeling with Orthogonal Principle Factor Analysis	Rong Jiang,; Wenyin Fu,; Janet Meiling Wang,; Charlie Chung-Ping Chen,; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:25Z	Linear Time Capacitance Extraction based on Implicit Congruence Transformation	Rong Jiang; Yu-hao Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:24Z	Substrate-Bias Optimized 0.18um 2.5 GHz 32-bit adder with Post-Manufacture Tunable Clock	Qi-Wei Kuo; Vikas Sharma; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:24Z	1-V 7-mW Dual-Band Fast-Locked Frequency Synthesizer	CHUNG-PING CHEN; Vikas Sharma,; Chien-Liang Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:24Z	ICCAP: A Linear Time Sparse Transformation and Reordering Algorithm for 3D BEM Capacitance Extraction	Rong Jiang; Charlie Chung-Ping Chen; CHUNG-PING CHEN

Showing items 56-65 of 112 (12 Page(s) Totally)
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