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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T04:59:54Z	LARTTE: A Posynomial-Based Lagrangian Relaxation Tuning Tool for Fast and Effective Gate-Sizing and Multiple Vt Assignment	Hsinwei Chou; Yu-Hao Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:54Z	A Yield Improvement Methodology Using Pre- and Post-Silicon Statistical Clock Scheduling	Jeng-Liang Tsai; DongHyun Baik; Charlie Chung-Ping Chen; Kewal K. Saluja; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:54Z	HiSIM: Hierarchical Interconnect-Centric Circuit Simulator	Tsung-Hao Chen; Jeng-Liang Tsai; Charlie Chung-Ping Chen; Tanay Karnik; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:53Z	Thermal and Power Integrity based Power/Ground Networks Optimization	Ting-Yuan Wang; Jeng-Liang Tsai; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:53Z	SPICE-Compatible Thermal Simulation with Lumped Circuit Modeling for Thermal Reliability Analysis based on Model Reduction	Ting-Yuan Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:53Z	ESPRIT: A Compact Reluctance Based Interconnect Model Considering Lossy Substrate Eddy Current	Rong Jiang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:53Z	Statistical Timing Analysis in Sequential Circuit for On-Chip Global Interconnect Pipelining	Lizheng Zhang; Yu Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:52Z	HiPRIME: Hierarchical and Passivity Preserved Interconnect Macromodeling Engine for RLKC Power Delivery	Yu-Min Lee; Yahong Cao; Tsung-Hao Chen; Janet Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:52Z	Zero-Skew Clock-Tree Optimization with Buffer-Insertion/Sizing and Wire-Sizing	Jeng-Laing Tsai; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:52Z	Wave-pipelined On-Chip Global Interconnect	Lizheng Zhang; Yuhen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:52Z	Realizable Reduction for Electromagnetically Coupled RLMC Interconnects	Rong Jiang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:04Z	The Power Grid Transient Simulation in Linear Time based on 3D Alternating-Direction-Implicit Method	Yu-Min Lee; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:04Z	Epsilon-Optimal Zero-Skew Clock Tree Wire-Sizing in Pseudo-Polynomial Time	Jeng-Laing Tsai; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:04Z	PODEA: POwer Delivery Efficient Analysis with Realizable Model Reduction	Rong Jiang; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:04Z	3D Thermal-ADI: An Efficient Chip-Level Transient Thermal Simulator	CHUNG-PING CHEN; Ting-Yuan Wang, Yu-Min Lee,; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:03Z	INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor	Tsung-Hao Chen; Clement Luk; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:03Z	Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method	Ting-Yuan Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:36:03Z	SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation	Tsung-Hao Chen; Clement Luk; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:15:42Z	3-D Thermal-ADI: a linear-time chip level transient thermal simulator	CHUNG-PING CHEN; Ting-Yuan Wang,; Charlie Chung-Ping Chen,; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:15:42Z	Optimal Wire-sizing Function under the Elmore Delay Model with Bounded Wiresizes	CHUNG-PING CHEN; Charlie Chung-Ping Chen; D. F. Wong; Yu-Min Lee
臺大學術典藏	2018-09-10T04:15:42Z	INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor	Tsung-Hao Chen; Clement Luk; Hyungsuk Kim; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:15:42Z	HiPRIME: Hierarchical and Passivity Reserved Interconnect Macromodeling Engine for RLKC Power Delivery	Yahong Cao; Yu-Min Lee; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:15:42Z	Optimization of the Power/Ground Network Wire-Sizing and Spacing Based on Sequential Network Simplex Algorithm	Ting-Yuan Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T03:50:58Z	FDTD-ADI: An Unconditionally Stable Full Wave Maxwell Equation Solver for VLSI Modeling	Charlie Chung-Ping Chen; Narayanan Murugesan; Tae-Woo Lee; Susan C. Hagness; Yu-Min Lee; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T03:50:58Z	Linear Time Hierarchical Capacitance Extraction Without Multipole Expansion	Pradeepsunder Ganesh; Charlie Chung-Ping Chen; CHUNG-PING CHEN; Saisanthosh Balakrishnan; Jong Hyuk Park; Hyungsuk Kim; Yu-Min Lee; Charlie Chung-Ping Chen

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