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显示项目 71-95 / 112 (共5页)
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机构 日期 题名 作者
臺大學術典藏 2018-09-10T05:29:22Z EPEEC: A Compact Eddy-Current-Aware Reluctance-Based Macromodel for High-Speed Interconnects above Lossy Multilayer Substrate Rong Jiang,; Wenyin Fu,; Charlie Chung-Ping Chen,; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T05:29:22Z Statistical Static Timing Analysis with Conditional Linear MAX/MIN Approximation and Extended Canonical Model Lizheng Zhang; Weijen Chen; Yuhen Hu; Charlie Chungping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T05:29:22Z False Path and Clock Scheduling Based Yield-Aware Gate Sizing Jeng-Liang Tsai; DongHyun Baik; Charlie Chung-Ping Chen; Kewal K. Saluja; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:54Z Statistical Timing Analysis with AMECT: Asymptotic MAX/MIN Approximation and Extended Canonical Timing Model Lizheng Zhang; Yu-Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:54Z A ROBDD-Based Generalized Nodal Control Scheme for Standby Leakage Power Reduction Hsinwei Chou; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:54Z LARTTE: A Posynomial-Based Lagrangian Relaxation Tuning Tool for Fast and Effective Gate-Sizing and Multiple Vt Assignment Hsinwei Chou; Yu-Hao Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:54Z A Yield Improvement Methodology Using Pre- and Post-Silicon Statistical Clock Scheduling Jeng-Liang Tsai; DongHyun Baik; Charlie Chung-Ping Chen; Kewal K. Saluja; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:54Z HiSIM: Hierarchical Interconnect-Centric Circuit Simulator Tsung-Hao Chen; Jeng-Liang Tsai; Charlie Chung-Ping Chen; Tanay Karnik; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:53Z Thermal and Power Integrity based Power/Ground Networks Optimization Ting-Yuan Wang; Jeng-Liang Tsai; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:53Z SPICE-Compatible Thermal Simulation with Lumped Circuit Modeling for Thermal Reliability Analysis based on Model Reduction Ting-Yuan Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:53Z ESPRIT: A Compact Reluctance Based Interconnect Model Considering Lossy Substrate Eddy Current Rong Jiang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:53Z Statistical Timing Analysis in Sequential Circuit for On-Chip Global Interconnect Pipelining Lizheng Zhang; Yu Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:52Z HiPRIME: Hierarchical and Passivity Preserved Interconnect Macromodeling Engine for RLKC Power Delivery Yu-Min Lee; Yahong Cao; Tsung-Hao Chen; Janet Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:52Z Zero-Skew Clock-Tree Optimization with Buffer-Insertion/Sizing and Wire-Sizing Jeng-Laing Tsai; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:52Z Wave-pipelined On-Chip Global Interconnect Lizheng Zhang; Yuhen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:59:52Z Realizable Reduction for Electromagnetically Coupled RLMC Interconnects Rong Jiang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:04Z The Power Grid Transient Simulation in Linear Time based on 3D Alternating-Direction-Implicit Method Yu-Min Lee; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:04Z Epsilon-Optimal Zero-Skew Clock Tree Wire-Sizing in Pseudo-Polynomial Time Jeng-Laing Tsai; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:04Z PODEA: POwer Delivery Efficient Analysis with Realizable Model Reduction Rong Jiang; Tsung-Hao Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:04Z 3D Thermal-ADI: An Efficient Chip-Level Transient Thermal Simulator CHUNG-PING CHEN; Ting-Yuan Wang, Yu-Min Lee,; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:03Z INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor Tsung-Hao Chen; Clement Luk; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:03Z Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method Ting-Yuan Wang; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:36:03Z SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation Tsung-Hao Chen; Clement Luk; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:15:42Z 3-D Thermal-ADI: a linear-time chip level transient thermal simulator CHUNG-PING CHEN; Ting-Yuan Wang,; Charlie Chung-Ping Chen,; CHUNG-PING CHEN
臺大學術典藏 2018-09-10T04:15:42Z Optimal Wire-sizing Function under the Elmore Delay Model with Bounded Wiresizes CHUNG-PING CHEN; Charlie Chung-Ping Chen; D. F. Wong; Yu-Min Lee

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