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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國立交通大學 2014-12-08T15:26:27Z Localization of NBTI-induced oxide damage in direct tunneling regime gate oxide pMOSFET using a novel low gate-leakage gated-diode (L-2-GD) method Chung, SS; Lo, DK; Yang, JJ; Lin, TC
國立交通大學 2014-12-08T15:26:23Z An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices Chen, SJ; Lin, TC; Lo, DK; Yang, JJ; Chung, SS; Kao, TY; Shiue, RY; Wang, CJ; Peng, YK
國立交通大學 2014-12-08T15:26:18Z A novel leakage current separation technique in a direct Tunneling regime gate oxide SONOS memory cell Chung, SS; Chiang, PY; Chou, G; Huang, CT; Chen, P; Chu, CH; Hsu, CCH
國立交通大學 2014-12-08T15:26:10Z The performance and reliability enhancement of ETOX P-channel flash EEPROM cell with P-doped floating-gate Tsai, HW; Chiang, PY; Chung, SS; Kuo, DS; Liang, MS
國立交通大學 2014-12-08T15:25:51Z The impact of STI induced reliabilities for scaled p-MOSFET in an advanced multiple oxide CMOS technology Chung, SS; Yeh, CH; Feng, SJ; Lai, CS; Yang, JJ; Chen, CC; Jin, Y; Chen, SC; Liang, MS
國立交通大學 2014-12-08T15:25:49Z An accurate RF CMOS gate resistance model compatible with HSPICE Lin, HW; Chung, SS; Wong, SC; Huang, GW
國立交通大學 2014-12-08T15:25:49Z Low leakage reliability characterization methodology for advanced CMOS with gate oxide in the 1nm range Chung, SS; Feng, HJ; Hsieh, YS; Liu, A; Lin, WM; Chen, DF; Ho, JH; Huang, KT; Yang, CK; Cheng, O; Sheng, YC; Wu, DY; Shiau, WT; Chien, SC; Liao, K; Sun, SW
國立交通大學 2014-12-08T15:25:47Z Different approaches for reliability enhancement of p-channel flash memory Chung, SS; Chen, YJ; Tsai, AW
國立交通大學 2014-12-08T15:25:27Z A new observation of the germanium outdiffusion effect on the hot carrier and NBTI reliabilities in sub-100nm technology strained-Si/SiGe CMOS devices Chung, SS; Liu, YR; Yeh, CF; Wu, SR; Lai, CS; Chang, TY; Ho, JH; Liu, CY; Huang, CT; Tsai, CT; Shiau, WT; Sun, SW
國立交通大學 2014-12-08T15:25:11Z A new insight into the degradation mechanisms of various mobility-enhanced CMOS devices with different substrate engineering Chung, SS; Liu, YR; Wu, SJ; Lai, CS; Liu, YC; Chen, DF; Lin, HS; Shiau, WT; Tsai, CT; Chien, SC; Sun, SW

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