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Showing items 1-25 of 136 (6 Page(s) Totally)
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| 國立交通大學 |
2020-10-05T02:01:30Z |
A Novel Architecture to Build Ideal-linearity Neuromorphic Synapses on a Pure Logic FinFET Platform Featuring 2.5ns PGM-time and 10(12) Endurance
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Hsieh, E. R.; Chang, H. Y.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert; Wong, S. Simon |
| 國立交通大學 |
2020-10-05T02:01:30Z |
Embedded PUF on 14nm HKMG FinFET Platform: A Novel 2-bit-per-cell OTP-based Memory Feasible for IoT Secuirty Solution in 5G Era
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Hsieh, E. R.; Wang, H. W.; Liu, C. H.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert |
| 國立交通大學 |
2020-10-05T02:01:28Z |
Novel Concept of the Transistor Variation Directed Toward the Circuit Implementation of Physical Unclonable Function (PUF) and True-random-number Generator (TRNG)
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Xiao, Y.; Hsieh, E. R.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert |
| 國立交通大學 |
2020-10-05T02:00:30Z |
The Advances of OTP Memory for Embedded Applications in HKMG Generation and Beyond
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Chung, Steve S. |
| 國立交通大學 |
2020-07-01T05:20:35Z |
The Demonstration of Gate Dielectric -fuse 4kb OTP Memory Feasible for Embedded Applications in High -k Metal-gate CMOS Generations and Beyond
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Hsieh, E. R.; Chang, C. W.; Chuang, C. C.; Chen, H. W.; Chung, Steve S. |
| 國立交通大學 |
2020-01-02T00:03:27Z |
The Understanding of Gate Capacitance Matching on Achieving a High Performance NC MOSFET with Sufficient Mobility
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Chiang, C. K.; Husan, P.; Lou, Y. C.; Li, F. L.; Hsieh, E. R.; Liu, C. H.; Chung, Steve S. |
| 國立交通大學 |
2019-10-05T00:09:43Z |
Embedded Resistive Switching Non-volatile Memory Technology for 28nm and Beyond High-k Metal-gate Generations
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Chung, Steve S. |
| 國立交通大學 |
2019-09-02T07:45:40Z |
The Understanding of Breakdown Path in Both High-k Metal-Gate CMOS and Resistance RAM by the RTN Measurement
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Chung, Steve S. |
| 國立交通大學 |
2019-06-03T01:09:17Z |
An Energy Efficient FinFET-based Field Programmable Synapse Array (FPSA) Feasible for One-shot Learning on EDGE AI
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Kuo, J. L.; Chen, H. W.; Hsieh, E. R.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert |
| 國立交通大學 |
2019-04-02T06:04:38Z |
Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F-2 and K-means Clustering for Power Reduction
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Zhou, Keji; Xue, Xiaoyong; Yang, Jianguo; Xu, Xiaoxin; Lv, Hangbing; Wang, Mingyu; Jing, Ming'e; Liu, Wenjun; Zeng, Xiaoyang; Chung, Steve S.; Li, Jing; Liu, Ming |
| 國立交通大學 |
2019-04-02T06:04:37Z |
Experimental Observation on the Random Dopant Fluctuation of Small Scale Trigate CMOS Devices
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Chung, Steve S. |
| 國立交通大學 |
2019-04-02T06:04:27Z |
Resistive Switching Non-volatile Memory Feasible for 28nm and Beyond Embedded Logic CMOS Technology
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Chung, Steve S. |
| 國立交通大學 |
2019-04-02T06:04:26Z |
A Novel ReWritable One-Time-Programming OTP (RW-OTP) Realized by Dielectric-fuse RRAM Devices Featuring Ultra-High Reliable Retention and Good Endurance for Embedded Applications
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Cheng, H. W.; Hsieh, E. R.; Huang, Z. H.; Chuang, C. H.; Chen, C. H.; Li, F. L.; Lo, Y. M.; Liu, C. H.; Chung, Steve S. |
| 國立交通大學 |
2019-04-02T06:00:32Z |
The investigation of charge loss mechanism in a two-bit wrapped-gate nitride storage nonvolatile memory
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Ho, Y. H.; Chung, Steve S.; Chen, H. H. |
| 國立交通大學 |
2019-04-02T05:58:37Z |
An Experimental Approach to Characterizing the Channel Local Temperature Induced by Self-Heating Effect in FinFET
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Hsieh, E. Ray; Jiang, Meng-Ru; Lin, Jian-Li; Chung, Steve S.; Chen, Tse Pu; Huang, Shih An; Chen, Tai-Ju; Cheng, Osbert |
| 國立交通大學 |
2018-08-21T05:57:09Z |
The Issues on the Power Consumption of Trigate FinFET: The Design and Manufacturing Guidelines
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Chung, Steve S.; Hsieh, E. R. |
| 國立交通大學 |
2018-08-21T05:57:09Z |
The Impact of TiN Barrier on the NBTI in an Advanced High-k Metal-gate p-channel MOSFET
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Huang, D. -C.; Hsieh, E. Ray; Gong, J.; Huang, C. -F.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:57:00Z |
The Guideline on Designing Face-tunneling FET for Large-scale-device Applications in IoT
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Hsieh, E. R.; Lee, J. W.; Lee, M. H.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:56:52Z |
A Novel Design of P-N Staggered Face-tunneling TFET Targeting for Low Power and Appropriate Performance Applications
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Hsieh, E. R.; Fan, Y. C.; Chang, K. Y.; Liu, C. H.; Chien, C. H.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Geometric Variation: A Novel Approach to Examine the Surface Roughness and the Line Roughness Effects in Trigate FinFETs
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Hsieh, E. R.; Fan, Y. C.; Liu, C. H.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R. |
| 國立交通大學 |
2018-08-21T05:53:03Z |
A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path
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Hsieh, E. Ray; Kuo, Yen Chen; Cheng, Chih-Hung; Kuo, Jing Ling; Jiang, Meng-Ru; Lin, Jian-Li; Chen, Hung-Wen; Chung, Steve S.; Liu, Chuan-Hsi; Chen, Tse Pu; Huang, Shih An; Chen, Tai-Ju; Cheng, Osbert |
| 國立交通大學 |
2018-01-24T07:42:48Z |
新穎高性能鰭式電晶體結構 及其高頻特性分析
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林建里; 莊紹勳; Lin, Jian-Li; Chung, Steve-S. |
| 國立交通大學 |
2018-01-24T07:42:00Z |
14奈米鰭式電晶體自熱效應的新穎溫度量測方法 及其對傳輸機制之影響
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江孟儒; 莊紹勳; Jiang, Meng-Ru; Chung, Steve S. |
| 國立交通大學 |
2018-01-24T07:41:58Z |
一種新穎的鰭式電晶體可程式神經陣列 在人工神經網路的應用
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陳泓文; 莊紹勳; Chen, Hung-Wen; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:56:06Z |
A theoretical and experimental evaluation of surface roughness variation in trigate metal oxide semiconductor field effect transistors
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Hsieh, E. R.; Chung, Steve S. |
Showing items 1-25 of 136 (6 Page(s) Totally)
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