English  |  正體中文  |  简体中文  |  2828323  
???header.visitor??? :  32178452    ???header.onlineuser??? :  1229
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"chung steve s"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-50 of 136  (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2020-10-05T02:01:30Z A Novel Architecture to Build Ideal-linearity Neuromorphic Synapses on a Pure Logic FinFET Platform Featuring 2.5ns PGM-time and 10(12) Endurance Hsieh, E. R.; Chang, H. Y.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert; Wong, S. Simon
國立交通大學 2020-10-05T02:01:30Z Embedded PUF on 14nm HKMG FinFET Platform: A Novel 2-bit-per-cell OTP-based Memory Feasible for IoT Secuirty Solution in 5G Era Hsieh, E. R.; Wang, H. W.; Liu, C. H.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert
國立交通大學 2020-10-05T02:01:28Z Novel Concept of the Transistor Variation Directed Toward the Circuit Implementation of Physical Unclonable Function (PUF) and True-random-number Generator (TRNG) Xiao, Y.; Hsieh, E. R.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert
國立交通大學 2020-10-05T02:00:30Z The Advances of OTP Memory for Embedded Applications in HKMG Generation and Beyond Chung, Steve S.
國立交通大學 2020-07-01T05:20:35Z The Demonstration of Gate Dielectric -fuse 4kb OTP Memory Feasible for Embedded Applications in High -k Metal-gate CMOS Generations and Beyond Hsieh, E. R.; Chang, C. W.; Chuang, C. C.; Chen, H. W.; Chung, Steve S.
國立交通大學 2020-01-02T00:03:27Z The Understanding of Gate Capacitance Matching on Achieving a High Performance NC MOSFET with Sufficient Mobility Chiang, C. K.; Husan, P.; Lou, Y. C.; Li, F. L.; Hsieh, E. R.; Liu, C. H.; Chung, Steve S.
國立交通大學 2019-10-05T00:09:43Z Embedded Resistive Switching Non-volatile Memory Technology for 28nm and Beyond High-k Metal-gate Generations Chung, Steve S.
國立交通大學 2019-09-02T07:45:40Z The Understanding of Breakdown Path in Both High-k Metal-Gate CMOS and Resistance RAM by the RTN Measurement Chung, Steve S.
國立交通大學 2019-06-03T01:09:17Z An Energy Efficient FinFET-based Field Programmable Synapse Array (FPSA) Feasible for One-shot Learning on EDGE AI Kuo, J. L.; Chen, H. W.; Hsieh, E. R.; Chung, Steve S.; Chen, T. P.; Huang, S. A.; Chen, T. J.; Cheng, Osbert
國立交通大學 2019-04-02T06:04:38Z Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F-2 and K-means Clustering for Power Reduction Zhou, Keji; Xue, Xiaoyong; Yang, Jianguo; Xu, Xiaoxin; Lv, Hangbing; Wang, Mingyu; Jing, Ming'e; Liu, Wenjun; Zeng, Xiaoyang; Chung, Steve S.; Li, Jing; Liu, Ming
國立交通大學 2019-04-02T06:04:37Z Experimental Observation on the Random Dopant Fluctuation of Small Scale Trigate CMOS Devices Chung, Steve S.
國立交通大學 2019-04-02T06:04:27Z Resistive Switching Non-volatile Memory Feasible for 28nm and Beyond Embedded Logic CMOS Technology Chung, Steve S.
國立交通大學 2019-04-02T06:04:26Z A Novel ReWritable One-Time-Programming OTP (RW-OTP) Realized by Dielectric-fuse RRAM Devices Featuring Ultra-High Reliable Retention and Good Endurance for Embedded Applications Cheng, H. W.; Hsieh, E. R.; Huang, Z. H.; Chuang, C. H.; Chen, C. H.; Li, F. L.; Lo, Y. M.; Liu, C. H.; Chung, Steve S.
國立交通大學 2019-04-02T06:00:32Z The investigation of charge loss mechanism in a two-bit wrapped-gate nitride storage nonvolatile memory Ho, Y. H.; Chung, Steve S.; Chen, H. H.
國立交通大學 2019-04-02T05:58:37Z An Experimental Approach to Characterizing the Channel Local Temperature Induced by Self-Heating Effect in FinFET Hsieh, E. Ray; Jiang, Meng-Ru; Lin, Jian-Li; Chung, Steve S.; Chen, Tse Pu; Huang, Shih An; Chen, Tai-Ju; Cheng, Osbert
國立交通大學 2018-08-21T05:57:09Z The Issues on the Power Consumption of Trigate FinFET: The Design and Manufacturing Guidelines Chung, Steve S.; Hsieh, E. R.
國立交通大學 2018-08-21T05:57:09Z The Impact of TiN Barrier on the NBTI in an Advanced High-k Metal-gate p-channel MOSFET Huang, D. -C.; Hsieh, E. Ray; Gong, J.; Huang, C. -F.; Chung, Steve S.
國立交通大學 2018-08-21T05:57:00Z The Guideline on Designing Face-tunneling FET for Large-scale-device Applications in IoT Hsieh, E. R.; Lee, J. W.; Lee, M. H.; Chung, Steve S.
國立交通大學 2018-08-21T05:56:52Z A Novel Design of P-N Staggered Face-tunneling TFET Targeting for Low Power and Appropriate Performance Applications Hsieh, E. R.; Fan, Y. C.; Chang, K. Y.; Liu, C. H.; Chien, C. H.; Chung, Steve S.
國立交通大學 2018-08-21T05:56:52Z Geometric Variation: A Novel Approach to Examine the Surface Roughness and the Line Roughness Effects in Trigate FinFETs Hsieh, E. R.; Fan, Y. C.; Liu, C. H.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R.
國立交通大學 2018-08-21T05:53:03Z A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path Hsieh, E. Ray; Kuo, Yen Chen; Cheng, Chih-Hung; Kuo, Jing Ling; Jiang, Meng-Ru; Lin, Jian-Li; Chen, Hung-Wen; Chung, Steve S.; Liu, Chuan-Hsi; Chen, Tse Pu; Huang, Shih An; Chen, Tai-Ju; Cheng, Osbert
國立交通大學 2018-01-24T07:42:48Z 新穎高性能鰭式電晶體結構 及其高頻特性分析 林建里; 莊紹勳; Lin, Jian-Li; Chung, Steve-S.
國立交通大學 2018-01-24T07:42:00Z 14奈米鰭式電晶體自熱效應的新穎溫度量測方法 及其對傳輸機制之影響 江孟儒; 莊紹勳; Jiang, Meng-Ru; Chung, Steve S.
國立交通大學 2018-01-24T07:41:58Z 一種新穎的鰭式電晶體可程式神經陣列 在人工神經網路的應用 陳泓文; 莊紹勳; Chen, Hung-Wen; Chung, Steve S.
國立交通大學 2017-04-21T06:56:06Z A theoretical and experimental evaluation of surface roughness variation in trigate metal oxide semiconductor field effect transistors Hsieh, E. R.; Chung, Steve S.
國立交通大學 2017-04-21T06:50:15Z Fully CMOS Compatible 3D Vertical RRAM with Self-aligned Self-selective Cell Enabling Sub-5nm Scaling Xu, Xiaoxin; Luo, Qing; Gong, Tiancheng; Lv, Hangbing; Long, Shibing; Liu, Qi; Chung, Steve S.; Li, Jing; Liu, Ming
國立交通大學 2017-04-21T06:50:15Z A Comprehensive Transport Model for High Performance HEMTs Considering the Parasitic Resistance and Capacitance Effects Hung, C. M.; Li, K. C.; Hsieh, E. R.; Wang, C. T.; Kou, C. I.; Chang, Edward Y.; Chung, Steve S.
國立交通大學 2017-04-21T06:50:15Z A New Variation Plot to Examine the Interfacial-dipole Induced Work-function Variation in Advanced High-k Metal-gate CMOS Devices Hsieh, E. R.; Wang, Y. D.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Hsu, S.
國立交通大學 2017-04-21T06:50:00Z The Experimental Demonstration of the BTI-Induced Breakdown Path in 28nm High-k Metal Gate Technology CMOS Devices Hsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Chang, K. Y.; Liu, C. H.; Ke, J. C.; Yang, C. W.; Tsai, C. T.
國立交通大學 2017-04-21T06:50:00Z The Process and Stress-Induced Variability Issues of Trigate CMOS Devices Chung, Steve S.
國立交通大學 2017-04-21T06:49:47Z The RTN Measurement Technique on Leakage Path Finding in Advanced High-k Metal Gate CMOS Devices Hsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Tsai, C. T.; Yew, T. R.
國立交通大學 2017-04-21T06:49:45Z 3D-TCAD Simulation Study of the Novel T-FinFET Structure for Sub-14nm Metal-Oxide-Semiconductor Field-Effect Transistor Chou, Chen-Han; Hsu, Chung-Chun; Chung, Steve S.; Chien, Chao-Hsin
國立交通大學 2017-04-21T06:49:45Z Design of Complementary Tilt-gate TFETs with SiGe/Si and III-V Integrations Feasible for Ultra-low-power Applications Hsieh, E. R.; Lin, Y. S.; Zhao, Y. B.; Liu, C. H.; Chien, C. H.; Chung, Steve S.
國立交通大學 2017-04-21T06:49:28Z The Impact of the Three-Dimensional Gate on the Trigate FinFETs Chung, Steve S.
國立交通大學 2017-04-21T06:49:14Z A Circuit Level Variability Prediction of Basic Logic Gates in Advanced Trigate CMOS Technology Hsieh, E. R.; Hung, C. M.; Wang, T. Y.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R.
國立交通大學 2017-04-21T06:49:09Z An Innovative 1T1R Dipole Dynamic Random Access Memory (DiRAM) featuring High Speed, Ultra-low power, and Low Voltage Operation Hsieh, E. R.; Chuang, C. H.; Chung, Steve S.
國立交通大學 2017-04-21T06:49:07Z Recent Advances of RTN Technique Towards the Understanding of the Gate Dielectric Reliability in Trigate FinFETs Chung, Steve S.
國立交通大學 2017-04-21T06:49:07Z Experimental Techniques on the Understanding of the Charge Loss in a SONOS Nitride-storage Nonvolatile Memory Hsieh, E. R.; Wang, H. T.; Chung, Steve S.; Chang, Wayne; Wang, S. D.; Chen, C. H.
國立交通大學 2017-04-21T06:49:02Z A Novel One Transistor Resistance-Gate Nonvolatile Memory Chung, Steve S.; Hsieh, E. R.; Yang, S. P.; Chuang, C. H.
國立交通大學 2017-04-21T06:48:53Z The Random Dopant and Gate Oxide Variations in Trigate MOSFETs Chung, Steve S.
國立交通大學 2017-04-21T06:48:48Z 3D-TCAD Simulation Study of the Contact All Around T-FinFET Structure for 10nm Metal-Oxide-Semiconductor Field-Effect Transistor Chou, Chen-Han; Hsu, Chung-Chun; Yeh, Wen-Kuan; Chung, Steve S.; Chien, Chao-Hsin
國立交通大學 2017-04-21T06:48:46Z A Novel One Transistor Non-volatile Memory Feasible for NOR and NAND Applications in IoT Era Chung, Steve S.; Hsieh, E. R.; Yang, S. P.; Chuang, C. H.
國立交通大學 2017-04-21T06:48:32Z Demonstration of 3D Vertical RRAM with Ultra Low-leakage, High-selectivity and Self-compliance Memory Cells Luo, Qing; Xu, Xiaoxin; Liu, Hongtao; Lv, Hangbing; Gong, Tiancheng; Long, Shibing; Liu, Qi; Sun, Haitao; Banerjee, Writam; Li, Ling; Gao, Jianfeng; Lu, Nianduan; Chung, Steve S.; Li, Jing; Liu, Ming
國立交通大學 2017-04-21T06:48:18Z The Demonstration of Low-cost and Logic Process Fully-Compatible OTP Memory on Advanced HKMG CMOS with a Newly found Dielectric Fuse Breakdown Hsieh, E. R.; Huang, Z. H.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Tsai, C. T.; Yew, T. R.
國立交通大學 2017-04-21T06:48:17Z High Performance Design of Tunneling FET for Low Voltage/Power Applications: Strategies and Solutions Chung, Steve S.
國立交通大學 2016-03-29T00:01:14Z 低功耗互補式穿隧場效電晶體的設計與製作 (I) 莊紹勳; Chung Steve S
國立交通大學 2016-03-28T08:17:32Z 高性能先進三維閘極CMOS應變元件設計-元件至電路的考量( III ) 莊紹勳; Chung Steve S
國立交通大學 2016-03-28T08:17:22Z 低功耗互補式穿隧場效電晶體的設計與製作 (I) 莊紹勳; Chung Steve S
國立交通大學 2016-03-28T00:04:19Z The understanding on the evolution of stress-induced gate leakage in high-k dielectric metal-oxide-field-effect transistor by random-telegraph-noise measurement Hsieh, E. R.; Chung, Steve S.
國立交通大學 2015-12-02T03:00:54Z The Observation of BTI-induced RTN Traps in Inversion and Accumulation Modes on HfO2 High-k Metal Gate 28nm CMOS Devices Wu, P. C.; Hsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Chang, K. Y.; Liu, C. H.; Ke, J. C.; Yang, C. W.; Tsai, C. T.

Showing items 1-50 of 136  (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page