English  |  正體中文  |  简体中文  |  總筆數 :0  
造訪人次 :  51406414    線上人數 :  991
教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
關於TAIR

瀏覽

消息

著作權

相關連結

"chung steve s"的相關文件

回到依作者瀏覽
依題名排序 依日期排序

顯示項目 101-136 / 136 (共3頁)
<< < 1 2 3 
每頁顯示[10|25|50]項目

機構 日期 題名 作者
國立交通大學 2014-12-12T01:55:13Z CMOS製程相容U型多重讀寫氮化矽快閃式記憶體之物理機制與可靠性探討 蔡政達; Tsai, Cheng-Ta; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:55:06Z 使用新的量測方法探討三面閘極金氧半電晶體 氧化層隨機陷阱造成之擾動效應 蔡漢旻; Tsai, Hanmin; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:37:27Z 決定高效能蕭特基金氧半場效應電晶體傳輸參數的新實驗方法 鄭士嵩; Cheng, Xhiz-Song; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:37:18Z 應變矽CMOS元件中隨機摻雜與隨機界面缺陷引起的臨界電壓變異度研究 程政穎; Cheng, Cheng-Ying; 莊紹勳; Chung, Steve-S.
國立交通大學 2014-12-12T01:27:11Z 二氧化鉿薄膜電阻式隨機存取記憶體之轉換機制及可靠度探討 王振鵬; Wang, Jen-Peng; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:27:07Z 隨機電報訊號量測於高閘極介電層N通道金氧半電晶體汲極電流波動之探討 張健宏; Chang, Chien-Hung; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:27:03Z 奈米級蕭特基金氧半場效電晶體之載子傳輸特性與通道背向散射研究 鄧安舜; Teng, An-Shun; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-12T01:27:01Z 隨機電報訊號量測法應用於前瞻CMOS元件應變技術引致的汲極電流不穩定性之研究 林米華; Lin, Mi-Hua; 莊紹勳; Chung, Steve S.
國立交通大學 2014-12-08T15:48:21Z New Observation of an Abnormal Leakage Current in Advanced CMOS Devices with Short Channel Lengths Down to 50nm and Beyond Hsieh, E. R.; Chung, Steve S.; Lin, Y. H.; Tsai, C. H.; Liu, P. W.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:47:46Z The investigation of charge loss mechanism in a two-bit wrapped-gate nitride storage nonvolatile memory Ho, Y. H.; Chung, Steve S.; Chen, H. H.
國立交通大學 2014-12-08T15:45:54Z The Observation of Trapping and Detrapping Effects in High-k Gate Dielectric MOSFETs by a New Gate Current Random Telegraph Noise (I(G)-RTN) Approach Chang, C. M.; Chung, Steve S.; Hsieh, Y. S.; Cheng, L. W.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:45:53Z More Strain and Less Stress- The Guideline for Developing High-End Strained CMOS Technologies with Acceptable Reliability Chung, Steve S.; Hsieh, E. R.; Huang, D. C.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:39:25Z The Understanding of Strain-Induced Device Degradation in Advanced MOSFETs with Process-Induced Strain Technology of 65nm Node and Beyond Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.
國立交通大學 2014-12-08T15:36:22Z The understanding of the drain-current fluctuation in a silicon-carbon source-drain strained n-channel metal-oxide-semiconductor field-effect transistors Hsieh, E. R.; Chung, Steve S.
國立交通大學 2014-12-08T15:33:48Z The Variability Issues in Small Scale Trigate CMOS Devices: Random Dopant and Trap Induced Fluctuations Chung, Steve S.
國立交通大學 2014-12-08T15:33:16Z Experimental Observation on the Random Dopant Fluctuation of Small Scale Trigate CMOS Devices Chung, Steve S.
國立交通大學 2014-12-08T15:32:43Z The Understanding of the Bulk Trigate MOSFET's Reliability Through the Manipulation of RTN Traps Hsieh, E. R.; Wu, P. C.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.
國立交通大學 2014-12-08T15:32:12Z The Physical Insights Into an Abnormal Erratic Behavior in the Resistance Random Access Memory Huang, Y. J.; Chung, Steve S.; Lee, H. Y.; Chen, Y. S.; Chen, F. T.; Gu, P. Y.; Tsai, M. -J.
國立交通大學 2014-12-08T15:30:46Z The Understanding of Multi-level RTN in Trigate MOSFETs Through the 2D Profiling of Traps and Its Impact on SRAM Performance: A New Failure Mechanism Found Hsieh, E. R.; Tsai, Y. L.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.
國立交通大學 2014-12-08T15:29:05Z Low Voltage and High Speed SONOS Flash Memory Technology: The Strategies and the Reliabilities Chung, Steve S.
國立交通大學 2014-12-08T15:28:53Z The mechanisms of random trap fluctuation in metal oxide semiconductor field effect transistors Hsieh, E. R.; Chung, Steve S.
國立交通大學 2014-12-08T15:28:09Z Extension of Moore's Law Via Strained Technologies-The Strategies and Challenges Chung, Steve S.
國立交通大學 2014-12-08T15:25:08Z Reliability issues for high performance nanoscale CMOS technologies with channel mobility enhancing schemes Chung, Steve S.
國立交通大學 2014-12-08T15:24:57Z New observations on the uniaxial and biaxial strain-induced hot carrier and NBTI Reliabilities for 65nm node CMOS devices and beyond Chung, Steve S.; Huang, D. C.; Tsai, Y. J.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:24:57Z Understanding of the leakage components and its correlation to the oxide scaling on the SONOS cell endurance and retention Chen, C. H.; Chiang, P. Y.; Chung, Steve S.; Chen, Terry; Chou, George C. W.; Chu, C. H.
國立交通大學 2014-12-08T15:22:00Z A New Observation of Strain-Induced Slow Traps in Advanced CMOS Technology with Process-Induced Strain Using Random Telegraph Noise Measurement Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.
國立交通大學 2014-12-08T15:21:56Z Design of High-Performance and Highly Reliable nMOSFETs with Embedded Si:C S/D Extension Stressor(Si:C S/D-E) Chung, Steve S.; Hsieh, E. R.; Liu, P. W.; Chiang, W. T.; Tsai, S. H.; Tsai, T. L.; Huang, R. M.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:21:21Z A New and Simple Experimental Approach to Characterizing the Carrier Transport and Reliability of Strained CMOS Devices in the Quasi-Ballistic Regime Hsieh, E. R.; Chung, Steve S.; Liu, P. W.; Chiang, W. T.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H.
國立交通大學 2014-12-08T15:20:29Z New Observations on the Physical Mechanism of Vth-Variation in Nanoscale CMOS Devices After Long Term Stress Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.; Liang, C. W.
國立交通大學 2014-12-08T15:16:50Z The incremental frequency charge pumping method: Extending the CMOS ultra-thin gate oxide measurement down to 1nm Chung, Steve S.
國立交通大學 2014-12-08T15:10:38Z The investigation of capture/emission mechanism in high-k gate dielectric soft breakdown by gate current random telegraph noise approach Chung, Steve S.; Chang, C. M.
國立交通大學 2014-12-08T15:10:03Z The channel backscattering characteristics of sub-100nm CMOS devices with different channel/substrate orientations Tsai, Y. J.; Chung, Steve S.; Liu, P. W.; Tsai, C. H.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:09:24Z Novel ultra-low voltage and high-speed programming/erasing schemes for SONOS flash memory with excellent data retention Chung, Steve S.; Tseng, Y. H.; Lai, C. S.; Hsu, Y. Y.; Ho, Eric; Chen, Terry; Peng, L. C.; Chu, C. H.
國立交通大學 2014-12-08T15:07:36Z Technology roadmaps on the ballistic transport in strain engineered nanoscale CMOS devices Chung, Steve S.; Tsai, Y. J.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學 2014-12-08T15:07:17Z The proximity of the strain induced effect to improve the electron mobility in a silicon-carbon source-drain structure of n-channel metal-oxide-semiconductor field-effect transistors Hsieh, E. R.; Chung, Steve S.
國立交通大學 2014-12-08T15:03:20Z The State-of-the-Art Mobility Enhancing Schemes for High-Performance Logic CMOS Technologies Chung, Steve S.

顯示項目 101-136 / 136 (共3頁)
<< < 1 2 3 
每頁顯示[10|25|50]項目