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"chung steve s"

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Showing items 106-130 of 136 (6 Page(s) Totally)
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Institution	Date	Title	Author
國立交通大學	2014-12-12T01:27:07Z	隨機電報訊號量測於高閘極介電層N通道金氧半電晶體汲極電流波動之探討	張健宏; Chang, Chien-Hung; 莊紹勳; Chung, Steve S.
國立交通大學	2014-12-12T01:27:03Z	奈米級蕭特基金氧半場效電晶體之載子傳輸特性與通道背向散射研究	鄧安舜; Teng, An-Shun; 莊紹勳; Chung, Steve S.
國立交通大學	2014-12-12T01:27:01Z	隨機電報訊號量測法應用於前瞻CMOS元件應變技術引致的汲極電流不穩定性之研究	林米華; Lin, Mi-Hua; 莊紹勳; Chung, Steve S.
國立交通大學	2014-12-08T15:48:21Z	New Observation of an Abnormal Leakage Current in Advanced CMOS Devices with Short Channel Lengths Down to 50nm and Beyond	Hsieh, E. R.; Chung, Steve S.; Lin, Y. H.; Tsai, C. H.; Liu, P. W.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學	2014-12-08T15:47:46Z	The investigation of charge loss mechanism in a two-bit wrapped-gate nitride storage nonvolatile memory	Ho, Y. H.; Chung, Steve S.; Chen, H. H.
國立交通大學	2014-12-08T15:45:54Z	The Observation of Trapping and Detrapping Effects in High-k Gate Dielectric MOSFETs by a New Gate Current Random Telegraph Noise (I(G)-RTN) Approach	Chang, C. M.; Chung, Steve S.; Hsieh, Y. S.; Cheng, L. W.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學	2014-12-08T15:45:53Z	More Strain and Less Stress- The Guideline for Developing High-End Strained CMOS Technologies with Acceptable Reliability	Chung, Steve S.; Hsieh, E. R.; Huang, D. C.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學	2014-12-08T15:39:25Z	The Understanding of Strain-Induced Device Degradation in Advanced MOSFETs with Process-Induced Strain Technology of 65nm Node and Beyond	Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.
國立交通大學	2014-12-08T15:36:22Z	The understanding of the drain-current fluctuation in a silicon-carbon source-drain strained n-channel metal-oxide-semiconductor field-effect transistors	Hsieh, E. R.; Chung, Steve S.
國立交通大學	2014-12-08T15:33:48Z	The Variability Issues in Small Scale Trigate CMOS Devices: Random Dopant and Trap Induced Fluctuations	Chung, Steve S.
國立交通大學	2014-12-08T15:33:16Z	Experimental Observation on the Random Dopant Fluctuation of Small Scale Trigate CMOS Devices	Chung, Steve S.
國立交通大學	2014-12-08T15:32:43Z	The Understanding of the Bulk Trigate MOSFET's Reliability Through the Manipulation of RTN Traps	Hsieh, E. R.; Wu, P. C.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.
國立交通大學	2014-12-08T15:32:12Z	The Physical Insights Into an Abnormal Erratic Behavior in the Resistance Random Access Memory	Huang, Y. J.; Chung, Steve S.; Lee, H. Y.; Chen, Y. S.; Chen, F. T.; Gu, P. Y.; Tsai, M. -J.
國立交通大學	2014-12-08T15:30:46Z	The Understanding of Multi-level RTN in Trigate MOSFETs Through the 2D Profiling of Traps and Its Impact on SRAM Performance: A New Failure Mechanism Found	Hsieh, E. R.; Tsai, Y. L.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.
國立交通大學	2014-12-08T15:29:05Z	Low Voltage and High Speed SONOS Flash Memory Technology: The Strategies and the Reliabilities	Chung, Steve S.
國立交通大學	2014-12-08T15:28:53Z	The mechanisms of random trap fluctuation in metal oxide semiconductor field effect transistors	Hsieh, E. R.; Chung, Steve S.
國立交通大學	2014-12-08T15:28:09Z	Extension of Moore's Law Via Strained Technologies-The Strategies and Challenges	Chung, Steve S.
國立交通大學	2014-12-08T15:25:08Z	Reliability issues for high performance nanoscale CMOS technologies with channel mobility enhancing schemes	Chung, Steve S.
國立交通大學	2014-12-08T15:24:57Z	New observations on the uniaxial and biaxial strain-induced hot carrier and NBTI Reliabilities for 65nm node CMOS devices and beyond	Chung, Steve S.; Huang, D. C.; Tsai, Y. J.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學	2014-12-08T15:24:57Z	Understanding of the leakage components and its correlation to the oxide scaling on the SONOS cell endurance and retention	Chen, C. H.; Chiang, P. Y.; Chung, Steve S.; Chen, Terry; Chou, George C. W.; Chu, C. H.
國立交通大學	2014-12-08T15:22:00Z	A New Observation of Strain-Induced Slow Traps in Advanced CMOS Technology with Process-Induced Strain Using Random Telegraph Noise Measurement	Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.
國立交通大學	2014-12-08T15:21:56Z	Design of High-Performance and Highly Reliable nMOSFETs with Embedded Si:C S/D Extension Stressor(Si:C S/D-E)	Chung, Steve S.; Hsieh, E. R.; Liu, P. W.; Chiang, W. T.; Tsai, S. H.; Tsai, T. L.; Huang, R. M.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W.
國立交通大學	2014-12-08T15:21:21Z	A New and Simple Experimental Approach to Characterizing the Carrier Transport and Reliability of Strained CMOS Devices in the Quasi-Ballistic Regime	Hsieh, E. R.; Chung, Steve S.; Liu, P. W.; Chiang, W. T.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H.
國立交通大學	2014-12-08T15:20:29Z	New Observations on the Physical Mechanism of Vth-Variation in Nanoscale CMOS Devices After Long Term Stress	Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.; Liang, C. W.
國立交通大學	2014-12-08T15:16:50Z	The incremental frequency charge pumping method: Extending the CMOS ultra-thin gate oxide measurement down to 1nm	Chung, Steve S.

Showing items 106-130 of 136 (6 Page(s) Totally)
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