|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51405245
線上人數 :
971
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"chung szu chi"的相關文件
顯示項目 1-7 / 7 (共1頁)
1
每頁顯示[10|25|50]項目
| 國立交通大學 |
2018-08-21T05:56:50Z |
An Efficient Countermeasure against Correlation Power-Analysis Attacks with Randomized Montgomery Operations for DF-ECC Processor
|
Lee, Jen-Wei; Chung, Szu-Chi; Chang, Hsie-Chia; Lee, Chen-Yi |
| 國立交通大學 |
2018-08-21T05:54:29Z |
An Improved DPA Countermeasure Based on Uniform Distribution Random Power Generator for IoT Applications
|
Chung, Szu-Chi; Yu, Chun-Yuan; Lee, Sung-Shine; Chang, Hsie-Chia; Lee, Chen-Yi |
| 國立交通大學 |
2018-01-24T07:42:11Z |
基於串流加密和身分為基礎的物聯網密碼系統
|
鍾思齊; 李鎮宜; Chung, Szu-Chi; Lee, Chen-Yi |
| 國立交通大學 |
2016-03-28T00:05:44Z |
A 3.40ms/GF(p(521)) and 2.77ms/GF(2(521)) DF-ECC Processor with Side-Channel Attack Resistance
|
Lee, Jen-Wei; Chung, Szu-Chi; Chang, Hsie-Chia; Lee, Chen-Yi |
| 國立交通大學 |
2015-07-21T08:29:01Z |
Efficient Hardware Architecture of eta(T) Pairing Accelerator Over Characteristic Three
|
Chung, Szu-Chi; Wu, Jing-Yu; Fu, Hsing-Ping; Lee, Jen-Wei; Chang, Hsie-Chia; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:33:56Z |
Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture
|
Lee, Jen-Wei; Chung, Szu-Chi; Chang, Hsie-Chia; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:30:05Z |
A High-Performance Elliptic Curve Cryptographic Processor over GF(p) with SPA Resistance
|
Chung, Szu-Chi; Lee, Jen-Wei; Chang, Hsie-Chia; Lee, Chen-Yi |
顯示項目 1-7 / 7 (共1頁)
1
每頁顯示[10|25|50]項目
|
