English  |  正體中文  |  简体中文  |  總筆數 :0  
造訪人次 :  51370130    線上人數 :  871
教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
關於TAIR

瀏覽

消息

著作權

相關連結

"chung yang huang"的相關文件

回到依作者瀏覽
依題名排序 依日期排序

顯示項目 31-46 / 46 (共2頁)
<< < 1 2 
每頁顯示[10|25|50]項目

機構 日期 題名 作者
臺大學術典藏 2018-09-10T07:42:21Z Electronic Design Automation: Synthesis, Verification, and Test L-T. Wang;K-T. Cheng;Y-W. Chang;C-Y. Huang;et. al.; L-T. Wang; K-T. Cheng; Y-W. Chang; C-Y. Huang; et. al.; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z Libra - A Library-Independent Framework for Post-Layout Performance Optimization R.C.-Y. Huang; Y. Wang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z A New Extended Finite State Machine (EFSM) Model for RTL Design Verification R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z Improving Constant-Coefficient Multiplier Verification by Partial Product Identification Chao-Yue (Colby) Lai; Chung-Yang (Ric) Huang; Kei-Yong Khoo; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z Speeding Up SoC Virtual Platform Simulation by Data-Dependency Aware Virtual Synchronization Kuen-Huei Lin;Siao-Jie Cai;Chung-Yang (Ric) Huang; Kuen-Huei Lin; Siao-Jie Cai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T06:37:58Z Scalable Exploration of Functional Dependency by Interpolation and Incremental SAT Solving Chih-Chun Lee; Jie-Hong R. Jiang; Chung-Yang Huang; Alan Mishchenko; CHUNG-YANG HUANG; JIE-HONG JIANG
臺大學術典藏 2018-09-10T06:37:58Z Scalable Exploration of Functional Dependency by Interpolation and Incremental SAT Solving Chih-Chun Lee; Jie-Hong R. Jiang; Chung-Yang Huang; Alan Mishchenko; CHUNG-YANG HUANG; JIE-HONG JIANG
臺大學術典藏 2018-09-10T06:37:18Z QuteSAT: A Robust Circuit-based SAT Solver for Complex Circuit Structure Chi-An Wu; Ting-Hao Lin; Chih-Chun Lee; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T06:37:18Z QuteIP: An IP Qualification Framework for System on Chip Hsing-Chih Hung; Chi-Wen Chang; Tin-Hao Lin; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T06:02:51Z Solving Constraint Satisfiability Problem For Automatic Generation of Design Verification Vectors Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T04:35:42Z Non-Assignable Signal Support During Formal Verification Of Circuit Designs Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T04:35:41Z A Circuit SAT Solver with Signal Correlation Guided Learning Feng Lu; Li-C. Wang; K-T. Cheng,; Ric C-Y. Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T03:50:38Z Using Word-Level ATPG and Modular Arithmetic Constraint-Solving Techniques for Assertion Property Checking R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T03:50:38Z An Analysis of ATPG and SAT algorithms for Formal Verification G. Parthasarathy; K-T. Cheng; C-Y Huang; CHUNG-YANG HUANG
臺大學術典藏 2011-01 A Robust ECO Engine by Resource-Constraint-Aware Technology Mapping and Incremental Routing Optimization Shao-Lun Huang; Chi-An Wu; Kai-Fu Tang; Chang-Hong Hsu; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏 2011 Match and replace - A functional ECO engine for multi-error circuit rectification. Lin, Wei-Hsun; Huang, Chung-Yang (Ric); CHUNG-YANG HUANG; Huang, Shao-Lun; Huang, Shao-Lun;Lin, Wei-Hsun;Huang, Chung-Yang (Ric)

顯示項目 31-46 / 46 (共2頁)
<< < 1 2 
每頁顯示[10|25|50]項目