臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

About TAIR
	About TAIR

Browse By
	Institution
	Author
	Title
	Date
	Statistics Chart
	Institution Facts
	Trend

News
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

Copyright
	Publisher & Journal Policy
	TAIR Copyright Conference Minutes

Related Links
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"chung yang ric huang"

Return to Browse by Author
Sorting by Title	Sort by Date

Showing items 1-28 of 28 (1 Page(s) Totally)
1
View [10|25|50] records per page

Institution	Date	Title	Author
元智大學	Dec-16	Fast and Accurate MPSoC Virtual Platform Simulation with Parallel Out-of- Order Execution Approach	Yu-Fu Yeh; Shu-Yen Lin; Chung-Yang (Ric) Huang
元智大學	Dec-16	Fast and Accurate MPSoC Virtual Platform Simulation with Parallel Out-of- Order Execution Approach	Yu-Fu Yeh; Shu-Yen Lin; Chung-Yang (Ric) Huang
臺大學術典藏	2018-09-10T08:46:44Z	SoC HW/SW Verification and Validation	Yu-Fan Yin; Chih-Jen Hsu; Thomas B. Huang; Ting-Mao Chang; CHUNG-YANG HUANG; Chung-Yang (Ric) Huang
臺大學術典藏	2018-09-10T08:46:44Z	Speeding Up MPSoC Virtual Platform Simulation by Ultra Synchronization Checking Method	Yu-Fu Yeh; Chung-Yang (Ric) Huang; Chi-An Wu; Hsin-Cheng Lin; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	A Unified Multi-Corner Multi-Mode Static Timing Analysis Engine	Chin-Chia Nien;Shih-Heng Tsai;Chung-Yang (Ric) Huang; Chin-Chia Nien; Shih-Heng Tsai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	A Unified Multi-Corner Multi-Mode Static Timing Analysis Engine	Chin-Chia Nien;Shih-Heng Tsai;Chung-Yang (Ric) Huang; Chin-Chia Nien; Shih-Heng Tsai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Speeding Up SoC Virtual Platform Simulation by Data-Dependency-Aware Synchronization and Scheduling	Kuen-Huei Lin;Siao-Jie Cai;Chung-Yang (Ric) Huang; Kuen-Huei Lin; Siao-Jie Cai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Speeding Up SoC Virtual Platform Simulation by Data-Dependency-Aware Synchronization and Scheduling	Kuen-Huei Lin;Siao-Jie Cai;Chung-Yang (Ric) Huang; Kuen-Huei Lin; Siao-Jie Cai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Formal Deadlock Checking on High-Level SystemC Designs	Chun-Nan Chou;Chang-Hong Hsu;Yueh-Tung Chao;Chung-Yang (Ric) Huang; Chun-Nan Chou; Chang-Hong Hsu; Yueh-Tung Chao; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Formal Deadlock Checking on High-Level SystemC Designs	Chun-Nan Chou;Chang-Hong Hsu;Yueh-Tung Chao;Chung-Yang (Ric) Huang; Chun-Nan Chou; Chang-Hong Hsu; Yueh-Tung Chao; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	A Robust Functional ECO Engine by SAT Proof Minimization and Interpolation Techniques	Bo-Han Wu;Chun-Ju Yang;Chung-Yang (Ric) Huang;Jie-Hong (Rol;) Jiang; Bo-Han Wu; Chun-Ju Yang; Chung-Yang (Ric) Huang; JIE-HONG JIANG; Jie-Hong (Rol; ) Jiang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	A Robust Functional ECO Engine by SAT Proof Minimization and Interpolation Techniques	Bo-Han Wu;Chun-Ju Yang;Chung-Yang (Ric) Huang;Jie-Hong (Rol;) Jiang; Bo-Han Wu; Chun-Ju Yang; Chung-Yang (Ric) Huang; JIE-HONG JIANG; Jie-Hong (Rol; ) Jiang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Automatic Constraint Generation for Guided Random Simulation	Hu-Hsi Yeh;Chung-Yang (Ric) Huang; Hu-Hsi Yeh; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:34Z	Automatic Constraint Generation for Guided Random Simulation	Hu-Hsi Yeh;Chung-Yang (Ric) Huang; Hu-Hsi Yeh; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T08:18:33Z	To SAT or Not to SAT: Scalable Exploration of Functional Dependency	Jie-Hong R. Jiang;Chih-Chun Lee;Alan Mishchenko;Chung-Yang (Ric) Huang; Jie-Hong R. Jiang; Chih-Chun Lee; Alan Mishchenko; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG; JIE-HONG JIANG
臺大學術典藏	2018-09-10T08:18:33Z	To SAT or Not to SAT: Scalable Exploration of Functional Dependency	Jie-Hong R. Jiang;Chih-Chun Lee;Alan Mishchenko;Chung-Yang (Ric) Huang; Jie-Hong R. Jiang; Chih-Chun Lee; Alan Mishchenko; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG; JIE-HONG JIANG
臺大學術典藏	2018-09-10T07:42:21Z	A False-Path Aware Formal Static Timing Analyzer Considering Simultaneous Input Transitions	Shih-Heng Tsai;Chung-Yang (Ric) Huang; Shih-Heng Tsai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:42:21Z	A False-Path Aware Formal Static Timing Analyzer Considering Simultaneous Input Transitions	Shih-Heng Tsai;Chung-Yang (Ric) Huang; Shih-Heng Tsai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:42:21Z	Interpolant Generation without Constructing Resolution Graph	Chih-Jen Hsu;Shao-Lun Huang;Chia-An Wu;Chung-Yang (Ric) Huang; Chih-Jen Hsu; Shao-Lun Huang; Chia-An Wu; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:42:21Z	Interpolant Generation without Constructing Resolution Graph	Chih-Jen Hsu;Shao-Lun Huang;Chia-An Wu;Chung-Yang (Ric) Huang; Chih-Jen Hsu; Shao-Lun Huang; Chia-An Wu; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:08:52Z	Improving Constant-Coefficient Multiplier Verification by Partial Product Identification	Chao-Yue (Colby) Lai; Chung-Yang (Ric) Huang; Kei-Yong Khoo; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:08:52Z	Speeding Up SoC Virtual Platform Simulation by Data-Dependency Aware Virtual Synchronization	Kuen-Huei Lin;Siao-Jie Cai;Chung-Yang (Ric) Huang; Kuen-Huei Lin; Siao-Jie Cai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T07:08:52Z	Speeding Up SoC Virtual Platform Simulation by Data-Dependency Aware Virtual Synchronization	Kuen-Huei Lin;Siao-Jie Cai;Chung-Yang (Ric) Huang; Kuen-Huei Lin; Siao-Jie Cai; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T06:37:18Z	QuteSAT: A Robust Circuit-based SAT Solver for Complex Circuit Structure	Chi-An Wu; Ting-Hao Lin; Chih-Chun Lee; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T06:37:18Z	QuteIP: An IP Qualification Framework for System on Chip	Hsing-Chih Hung; Chi-Wen Chang; Tin-Hao Lin; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T06:02:51Z	Solving Constraint Satisfiability Problem For Automatic Generation of Design Verification Vectors	Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2018-09-10T04:35:42Z	Non-Assignable Signal Support During Formal Verification Of Circuit Designs	Chung-Yang (Ric) Huang; CHUNG-YANG HUANG
臺大學術典藏	2011-01	A Robust ECO Engine by Resource-Constraint-Aware Technology Mapping and Incremental Routing Optimization	Shao-Lun Huang; Chi-An Wu; Kai-Fu Tang; Chang-Hong Hsu; Chung-Yang (Ric) Huang; CHUNG-YANG HUANG

Showing items 1-28 of 28 (1 Page(s) Totally)
1
View [10|25|50] records per page

	English \| 正體中文 \| 简体中文 \| Total items :0
	Visitors : 51485512 Online Users : 628 Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library