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"chung yun yan"的相關文件
顯示項目 1-5 / 5 (共1頁)
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| 國立交通大學 |
2020-10-05T02:01:30Z |
First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate
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Cheng, Chao-Ching; Chung, Yun-Yan; Li, Ming-Yang; Lin, Chao-Ting; Li, Chi-Feng; Chen, Jyun-Hong; Lai, Tung-Yen; Li, Kai-Shin; Shieh, Jia-Min; Su, Sheng-Kai; Chiang, Hung-Li; Chen, Tzu-Chiang; Li, Lain-Jong; Wong, H-S Philip; Chien, Chao-Hsin |
| 國立交通大學 |
2020-01-02T00:04:18Z |
Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiOx/Si Substrates Using Area-Selective CVD Technology
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Chung, Yun-Yan; Lu, Kuan-Cheng; Cheng, Chao-Ching; Li, Ming-Yang; Lin, Chao-Ting; Li, Chi-Feng; Chen, Jyun-Hong; Lai, Tung-Yen; Li, Kai-Shin; Shieh, Jia-Min; Su, Sheng-Kai; Chiang, Hung-Li; Chen, Tzu-Chiang; Li, Lain-Jong; Wong, H-S Philip; Jian, Wen-Bin; Chien, Chao-Hsin |
| 國立交通大學 |
2019-12-13T01:09:53Z |
Experimentally Determining the Top and Edge Contact Resistivities of Two-Step Sulfurization Nb-Doped MoS2 Films Using the Transmission Line Measurement
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Chung, Yun-Yan; Li, Chi-Feng; Lin, Chao-Ting; Ho, Yen-Teng; Chien, Chao-Hsin |
| 國立交通大學 |
2019-04-02T06:00:28Z |
Demonstration of HfO2-Based Gate Dielectric With Low Interface State Density and Sub-nm EOT on Ge by Incorporating Ti Into Interfacial Layer
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Tsai, Yi-He; Chou, Chen-Han; Chung, Yun-Yan; Yeh, Wen-Kuan; Lin, Yu-Hsien; Ko, Fu-Hsiang; Chien, Chao-Hsin |
| 國立交通大學 |
2018-08-21T05:53:36Z |
Study of the Band Alignment between Atomic-Layer-Deposited High-kappa Dielectrics and MoS2 Film
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Chung, Yun-Yan; Tsai, Ming-Li; Ho, Yen-Teng; Tseng, Yuan-Chieh; Chien, Chao-Hsin |
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