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Showing items 1-10 of 10 (1 Page(s) Totally)
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| 國立成功大學 |
2023-12 |
Bilayered Oxide Heterostructure-Mediated Capacitance-Based Neuroplasticity Modulation for Neuromorphic Classification
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Lin;Pei-En;Chen;Kuan-Ting;Chaurasiya;Rajneesh;Le;Hoang-Hiep;Cheng;Chia-Hao;Lu;Darsen, Darsen D.;Chen;Jen-Sue |
| 國立成功大學 |
2023-05-8 |
HfTaOX Rectifying Layer for HfOX-Based RRAM for High-Accuracy Neuromorphic Applications
|
Chang;Ting-Jia;Le;Hoang-Hiep;Li;Cheng-Ying;Chu;Sheng-Yuan;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2023-03 |
TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET
|
Chang;Shu-Wei;Chou;Jia-Hon;Lee;Wen-Hsi;Lee;Yao-Jen;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2022-09-1 |
Nanosheet-Compatible Complementary-Field Effect Transistor Logic Non-Volatile Memory Device
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Chang;Shu-Wei;Chang;Yu-Ming;Lee;Wen-Hsi;Lee;Yao-Jen;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2022-03-22 |
Impact of the Barrier Layer on the High Thermal and Mechanical Stability of a Flexible Resistive Memory in a Neural Network Application
|
Pal;Parthasarathi;Mazumder;Soumen;Huang;Chih-Wei;Lu;Darsen, Darsen D.;Wang;Yeong-Her |
| 國立成功大學 |
2022-02 |
Compact model of retention characteristics of ferroelectric FinFET synapse with MFIS gate stack
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Baig;Aftab, Md;Le;Hoang-Hiep;De;Sourav;Chang;Che-Wei;Hsieh;Chia-Chi;Huang;Xiao-Shan;Lee;Yao-Jen;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2021-08 |
Robust Binary Neural Network Operation From 233 K to 398 K via Gate Stack and Bias Optimization of Ferroelectric FinFET Synapses
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De;Sourav;Le;Hoang-Hiep;Qiu;Bo-Han;Baig;Aftab, Md;Sung;Po-Jung;Su;Chun-Jung;Lee;Yao-Jen;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2021-02-23 |
Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering
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De;Sourav;Qu;Bo-Han;Bu;Wei-Xuan;Baig;Aftab, Mohammad;Sung;Jung, Po;Su;Jung, Chun;Lee;Yao-Jen;Lu;Darsen, Darsen D. |
| 國立成功大學 |
2020-10 |
Automated extraction of barrier heights for asymmetric MIM tunneling diodes
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Lin;Wallace;Lu;Darsen, Darsen D.;Hong;Yi-Xiu;Hsu;Wei-Chou |
| 國立成功大學 |
2018-03 |
An FET With a Source Tunneling Barrier Showing Suppressed Short-Channel Effects for Low-Power Applications
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Hsieh;Yu-Feng;Chen;Si-Hua;Chen;Nan-Yow;Lee;Wen-Jay;Tsai;Jyun-Hwei;Chen;Chun-Nan;Chiang;Meng-Hsueh;Lu;Darsen, Darsen D.;Kao;Kuo-Hsing |
Showing items 1-10 of 10 (1 Page(s) Totally)
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