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| 國立交通大學 |
2017-04-21T06:48:34Z |
A Layout-Aware Test Methodology for Silicon Interposer in 3D System-in-a-Package
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Gu, Ruei-Ting; Ho, Cheng-You; Li, Katherine Shu-Min; Ho, Yingchieh; Chen, Liang-Bi; Hsieh, Kai-Yang; Huang, Jiun-Jie; Cheng, Bo-Chuan; Wang, Sying-Jyan; Gao, Zih-Huan |
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