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Showing items 1-10 of 61 (7 Page(s) Totally)
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| 國立交通大學 |
2020-10-05T01:59:50Z |
SiC Strained nMOSFETs With Enhanced High- Frequency Performance and Impact on Flicker Noise and Random Telegraph Noise
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Guo, Jyh-Chyurn; Chang, Chih-Shiang |
| 國立交通大學 |
2020-05-05T00:01:56Z |
A New Compact Model for Accurate Simulation of RF Noise in Sub-40nm Multi-finger nMOSFETs
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Yeh, Kuo-Liang; Guo, Jyh-Chyurn |
| 國立交通大學 |
2020-02-02T23:55:33Z |
New Observation and Analysis of Layout Dependent Effects in Sub-40nm Multi-Ring and Multi-Finger nMOSFETs for High Frequency Applications
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Li, Zu-Cheng; Guo, Jyh-Chyurn; Lin, Jinq-Min |
| 國立交通大學 |
2019-12-13T01:12:53Z |
The Impact of Layout Dependent Intrinsic Parasitic RLC on High Frequency Performance in 3T and 4T Multi-finger nMOSFETs
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Guo, Jyh-Chyurn; Ou, Jyun-Rong; Lin, Jinq-Min |
| 國立交通大學 |
2018-08-21T05:57:06Z |
Low Power UWB CMOS LNA Using Resistive Feedback and Current-Reused Techniques Under Forward Body Bias
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Guo, Jyh-Chyurn; Lin, Ching-Shiang |
| 國立交通大學 |
2018-08-21T05:57:01Z |
Low Voltage and Low power UWB CMOS LNA using Current-Reused and Forward Body Biasing Techniques
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Guo, Jyh-Chyurn; Lin, Ching-Shiang; Liang, Yu-Tang |
| 國立交通大學 |
2018-08-21T05:56:54Z |
The Impact of Uniaxial Strain on Flicker Noise and Random Telegraph Noise of SiC Strained nMOSFETs in 40nm CMOS Technology
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Yeh, Kuo-Liang; Chang, Chih-Shiang; Guo, Jyh-Chyurn |
| 國立交通大學 |
2018-01-24T07:38:13Z |
奈米Si CMOS元件模型與參數萃取方法應用於包含佈局與應力工程效應之高頻模擬與雜訊分析
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葉國良; 郭治群; Yeh, Kuo-Liang; Guo, Jyh-Chyurn |
| 國立交通大學 |
2017-04-21T06:56:32Z |
A Comprehensive Characterization Method for Lateral Profiling of Interface Traps and Trapped Charges in P-SONOS Cell Devices
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Guo, Jyh-Chyurn; Du, Pei-Ying |
| 國立交通大學 |
2017-04-21T06:50:04Z |
The Impact of Layout Dependent Effects on Mobility and Flicker Noise in Nanoscale Multifinger nMOSFETs for RF and Analog Design
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Guo, Jyh-Chyurn; Lo, Yi-Zen; Ou, Jyun-Rong |
Showing items 1-10 of 61 (7 Page(s) Totally)
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