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Showing items 1-6 of 6 (1 Page(s) Totally)
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| 國立臺灣大學 |
2007 |
A time-constant calibrated phase-locked loop with a fast-locked time
|
Han, Sung-Rung; Chuang, Chi-Nan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2005 |
A single-path pulsewidth control loop with a built-in delay-locked loop
|
Han, Sung-Rung; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004-03 |
A 500-MHz–1.25-GHz Fast-Locking Pulsewidth Control Loop With Presettable Duty Cycle
|
Han, Sung-Rung; Liu, Shen-Iuan |
| 臺大學術典藏 |
2004-03 |
A 500-MHz–1.25-GHz Fast-Locking Pulsewidth Control Loop With Presettable Duty Cycle
|
Han, Sung-Rung; Liu, Shen-Iuan; Han, Sung-Rung; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004 |
CMOS脈波寬度控制迴路暨鎖相迴路之分析與設計
|
韓松融; Han, Sung-Rung |
| 國立臺灣大學 |
2004 |
A 500-MHz-1.25-GHz fast-locking pulsewidth control loop with presettable duty cycle
|
Han, Sung-Rung; Liu, Shen-Iuan |
Showing items 1-6 of 6 (1 Page(s) Totally)
1
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