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Showing items 106-115 of 127 (13 Page(s) Totally)
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| 國立臺灣科技大學 |
2016 |
A built-in electrical test circuit for detecting open leads in assembled PCB circuits
|
Miyabe, T;Hashizume, M;Yotsuyanagi, H;Lu, S.-K;Roth, Z. |
| 國立臺灣科技大學 |
2016 |
Electrical interconnect test of solder joint part with boundary scan flip flops and a built-in test circuit
|
Hashizume, M;Ikiri, Y;Konishi, T;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
Enhanced Built-In Self-Repair Techniques for Improving Fabrication Yield and Reliability of Embedded Memories
|
Lu, S.-K;Tsai, C.-J;Hashizume, M. |
| 國立臺灣科技大學 |
2016 |
A power supply circuit for interconnect tests based on injected charge volume of 3D IC
|
Ohtani, K;Hashizume, M;Suga, D;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
A built-in defective level monitor of resistive open defects in 3D ICs with logic gates
|
Hashizume, M;Odoriba, A;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
Testability for resistive open defects by electrical interconnect test of 3D ICs without boundary scan flip flops
|
Ali, F.A.B;Hashizume, M;Ikiri, Y;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
Adaptive ECC Techniques for Yield and Reliability Enhancement of Flash Memories
|
Lu, S.-K;Zhong, S.-X;Hashizume, M. |
| 國立臺灣科技大學 |
2016 |
An enhanced built-in self-repair technique for yield and reliability improvement of embedded memories
|
Lu, S.-K;Lin, H.-W;Hashizume, M. |
| 國立臺灣科技大學 |
2015 |
Address scrambling and data inversion techniques for yield enhancement of NROM-Based ROMs
|
Lu, S.-K.;Li, T.-L.;Hashizume, M.;Chen, J.-L. |
| 國立臺灣科技大學 |
2015 |
Electrical interconnect test method of 3D ICs by injected charge volume
|
Suga, D.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
Showing items 106-115 of 127 (13 Page(s) Totally)
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