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Showing items 1-5 of 5 (1 Page(s) Totally)
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| 淡江大學 |
2008-06 |
A Novel Reseeding Mechanism for Improving Pseudo-Random Testing of VLSI Circuits
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Rau, Jiann-chyi; Wu, Po-han; Ho, Ying-fu |
| 淡江大學 |
2005-05-23 |
A novel reseeding mechanism for pseudo-random testing of VLSI circuits
|
Rau, Jiann-chyi; Ho, Ying-fu; Wu, Po-han |
| 淡江大學 |
2005 |
A novel reseeding mechanism for pseudo-random testing of VLSI circuits
|
何應甫; Ho, Ying-fu |
| 淡江大學 |
2004-05 |
Built-In Reseeding With Modifying Technique For Bist
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Rau, Jiann-chyi; Yang, Ta-wei; Ho, Ying-fu |
| 淡江大學 |
2004 |
An Efficient Reseeding With Modifying Technique for Pseudo-Random-Based BIST
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Rau, Jiann-chyi; Yang, Ta-wei; Ho, Ying-fu |
Showing items 1-5 of 5 (1 Page(s) Totally)
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