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Showing items 1-7 of 7 (1 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:27:35Z |
A numerical model for simulating MOSFET gate current degradation by considering the interface state generation
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Yih, CM; Chung, SS; Hsu, CCH |
| 國立交通大學 |
2014-12-08T15:26:51Z |
Investigation of the gate dielectric oxidation treatment in trench gate power devices
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Lin, MJ; Liaw, CE; Chang, JJ; Chang, FL; Hsu, CCH; Cheng, HC |
| 國立交通大學 |
2014-12-08T15:26:18Z |
A novel leakage current separation technique in a direct Tunneling regime gate oxide SONOS memory cell
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Chung, SS; Chiang, PY; Chou, G; Huang, CT; Chen, P; Chu, CH; Hsu, CCH |
| 國立交通大學 |
2014-12-08T15:04:13Z |
DIRECT OBSERVATION OF CHANNEL-DOPING-DEPENDENT REVERSE SHORT-CHANNEL EFFECT USING DECOUPLED C-V TECHNIQUE
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GUO, JC; HSU, CCH; CHUNG, SSS |
| 國立交通大學 |
2014-12-08T15:03:44Z |
ANOMALOUS REVERSE SHORT-CHANNEL EFFECT IN P+ POLYSILICON GATED P-CHANNEL MOSFET
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CHANG, CY; LIN, CY; CHOU, JW; HSU, CCH; PAN, HT; KO, J |
| 國立交通大學 |
2014-12-08T15:03:33Z |
TRANSCONDUCTANCE ENHANCEMENT DUE TO BACK BIAS FOR SUBMICRON NMOSFET
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GUO, JC; CHANG, MC; LU, CY; HSU, CCH; CHUNG, SSS |
| 國立交通大學 |
2014-12-08T15:03:14Z |
SUPPRESSION OF BORON PENETRATION IN BF2-IMPLANTED P-TYPE GATE MOSFET BY TRAPPING OF FLUORINES IN AMORPHOUS GATE
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LIN, CY; CHANG, CY; HSU, CCH |
Showing items 1-7 of 7 (1 Page(s) Totally)
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