|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"hsu huai yi"
Showing items 1-14 of 14 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 國立臺灣大學 |
2006 |
適用於通訊及儲存系統之高性能可重規劃性里德所羅門矽智產設計
|
許槐益; Hsu, Huai-Yi |
| 國立臺灣大學 |
2006 |
Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems
|
Hsu, Huai-Yi; Wu, An-Yeu (Andy); Yeo, Jih-Chiang |
| 國立臺灣大學 |
2006 |
Multi-Symbol-Sliced Dynamically Reconfigurable Reed–Solomon Decoder Design Based on Unified Finite-Field Processing Element
|
Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu |
| 國立臺灣大學 |
2004-08 |
Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems
|
Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu |
| 臺大學術典藏 |
2004-08 |
Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems
|
Hsu, H.-Y. and Yeo, J.-C. and Wu, A.-Y.; Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu; Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu |
| 國立臺灣大學 |
2004-05 |
Least squares approximation-based ROM-free direct digital frequency synthesizer
|
Wen, Ching-Hua; Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu |
| 臺大學術典藏 |
2004-05 |
Least squares approximation-based ROM-free direct digital frequency synthesizer
|
Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu; Wen, Ching-Hua; Wen, Ching-Hua; Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu |
| 國立臺灣大學 |
2004 |
A scalable Reed-Solomon decoding processor based on unified finite-field processing element design
|
Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu |
| 臺大學術典藏 |
2004 |
A scalable Reed-Solomon decoding processor based on unified finite-field processing element design
|
Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu; Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu |
| 國立臺灣大學 |
2003 |
A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm
|
Hsu, Huai-Yi; Wang, Sheng-Feng; Wu, An-Yeu |
| 臺大學術典藏 |
2003 |
A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm
|
Hsu, Huai-Yi; Wang, Sheng-Feng; Wu, An-Yeu; Hsu, Huai-Yi; Wang, Sheng-Feng; Wu, An-Yeu |
| 國立臺灣大學 |
2002-08 |
VLSI design of a reconfigurable multi-mode Reed-Solomon codec for high-speed communication systems
|
Hsu, Huai-Yi; Wu, An-Yeu |
| 國立臺灣大學 |
2001-09 |
A very low-cost multi-mode Reed Solomon decoder based on Peterson-Gorenstein-Zierler algorithm
|
Wang, Sheng-Feng; Hsu, Huai-Yi; Wu, An-Yeu |
| 臺大學術典藏 |
2001-09 |
A very low-cost multi-mode Reed Solomon decoder based on Peterson-Gorenstein-Zierler algorithm
|
Wang, Sheng-Feng; Hsu, Huai-Yi; Wu, An-Yeu; Wang, Sheng-Feng; Hsu, Huai-Yi; Wu, An-Yeu |
Showing items 1-14 of 14 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
